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F75334
F75334DG
Performance Controller
Release Date: July, 2007 Version: V0.25P
July, 2007 V0.25P
F75334
F75334DG Datasheet Revision History
Version V0.10P V0.20P V0.21P Date 2005/09/01 2005/09/02 2005/10/13 Page Revision History Preliminary Version Added Register Description and Application Circuit Updated I2C Address Strapping Description of Function Description V0.22P V0.23P 2005/12/19 2006/07/04 Updated Schematic Added function on pin7/pin13/pin29 Added Hardware Monitor Register description (CR 0Ah ~ CR0Eh) Modified Hardware Monitor Register description (CR02h/93h/9Fh/AFh/BFh/CFh) V0.24P 2006/12/28 2 V0.25P 2007/7/6 Added Global Register CR1Ch Updated application circuit Added Electrical Characteristic Chapter Added Patent Note Company readdress
Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.
LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Fintek for any damages resulting from such improper use or sales.
July, 2007 V0.25P
F75334 Table of Content
1. 2. 3. 4. 5. 6.
7.
8.
General Description ........................................................................................................................1 Feature List .....................................................................................................................................1 Key Specification............................................................................................................................3 Block Diagram ................................................................................................................................3 Pin Configuration............................................................................................................................4 Pin Description................................................................................................................................5 6.1 Power Pin ....................................................................................................................................5 6.2 Hardware Monitor Pin ................................................................................................................5 6.3 VID Controlling Pin....................................................................................................................6 6.4 Loading Gauge Pin .....................................................................................................................6 Function Description.......................................................................................................................8 7.1 Hardware monitor .......................................................................................................................8 7.2 Loading Gauge..........................................................................................................................16 7.3 VID on the fly control...............................................................................................................17 7.4 Other .........................................................................................................................................18 Register Description......................................................................................................................21 8.1.1 Configuration Register Index 00h...................................................................................21 8.1.2 Global function Configuration Register Index 01h ........................................................21 8.1.3 Global PME Status Register Index 02h ..........................................................................21 8.1.4 Global PME Status Register Index 03h (Power by VSB3V)..........................................21 8.1.5 GPIO1 Pin Function Select Register Index 04h (Power by VSB3V) .............................22 8.1.6 GPIO2/GPIO3 Pin Function Select Register ......................................................................22 8.1.7 GPIO4 Pin Function Select Register Index 07h .............................................................22 8.1.8 GPIO1X Output Data Register Index 10h (Power by VSB3V)......................................23 8.1.9 8.1.10 8.1.11 8.1.12 8.1.13 8.1.14 8.1.15 GPIO1X Output Data Enable Register Index 11h (Power by VSB3V)..........................23 GPIO1X Output Mode Select Register Index 12h (Power by VSB3V) .........................23 GPIO1X Pin Status Register Index 13h (Power by VSB3V) .........................................23 GPIO2X Output Data Register Index 14h (Power by VSB3V)......................................23 GPIO2X Output Data Enable Register Index 15h (Power by VSB3V)..........................23 GPIO2X Output Mode Select Register Index 16h (Power by VSB3V) .........................23 GPIO2X Pin Status Register Index 17h (Power by VSB3V) .........................................23
8.1.16 GPIO3X Output Data Register Index 18h (Power by VSB3V)......................................24 8.1.17 GPIO3X Output Data Enable Register Index 19h (Power by VSB3V)..........................24
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8.1.18 8.1.19 8.1.20 8.1.21 8.1.22 8.1.23 8.1.24 8.1.25 8.1.26 8.1.27 8.1.28 8.2.1 8.2.2 8.2.3 8.2.4 8.2.5 8.2.6 8.2.7 8.2.8 8.2.9 8.2.10 8.2.11 8.2.12 8.2.13 8.2.14 8.2.15 8.2.16 8.2.17 8.2.18 8.2.19 8.2.20 8.2.21 8.2.22 8.2.23 8.2.24 8.2.25 8.2.26 GPIO3X Output Mode Select Register Index 1Ah (Power by VSB3V) ........................24 GPIO3X Pin Status Register Index 1Bh (Power by VSB3V).........................................24 OVT and Fan_Fault Pin Select Register Index 1Ch (Power by VSB3V).......................24 GPIO4X Output Data Register Index 20h ......................................................................24 GPIO4X Output Data Enable Register Index 21h ..........................................................24 GPIO4X Output Mode Select Register Index 22h..........................................................25 GPIO4X Pin Status Register Index 23h..........................................................................25 CHIPID(1) Register - Index 5Ah .......................................................................................25 CHIPID(2) Register - Index 5Bh .......................................................................................25 VENDOR ID(1) Register - Index 5Dh...............................................................................25 VENDOR ID(2) Register - Index 5Eh ...............................................................................25 Configuration Register Index 01h..................................................................................26 Configuration Register Index 02h...................................................................................26 PECI SST AMDSI Interface Configuration Register Index 0Ah ...................................26 AMDSI Version Register Index 0Bh (MEAS_TYPE ==2'b10)..................................26 Dual Single Core select Register Index 0Bh (MEAS_TYPE ==2'b01)......................26 TCC Activation Temperature Register Index 0Ch (MEAS_TYPE == 2'b01) ............27 AMDSI Node ID Register Index 0Ch (MEAS_TYPE ==2'b10) ................................27 SST Address Register Index 0Dh ...................................................................................27 CPU Temp. Measure Select Register Index 0Eh ............................................................27 Voltage PME# Enable Register Index 10h......................................................................27 Voltage Interrupt Status Register Index 11h ...................................................................28 Voltage Exceeds Real Time Status Register 1 Index 12h ...............................................28 Voltage Mode select Register Index 13h ........................................................................28 Voltage reading and limit Index 20h- 4Fh .......................................................................28 Temperature PME# Enable Register Index 60h..............................................................29 Temperature Interrupt Status Register Index 61h ...........................................................29 Temperature Real Time Status Register Index 62h.........................................................30 OVT Output Enable Register 1 Index 66h......................................................................30 Temperature Sensor Type Register Index 6Bh ...............................................................30 LOCAL and TEMP1 Limit Hystersis Select Register -- Index 6Ch...................................31 TEMP2 and TEMP3 Limit Hystersis Select Register -- Index 6Dh ...................................31 DIODE OPEN Status Register -- Index 6Fh.......................................................................31 Temperature Index 70h- 8Fh...........................................................................................31 Temperature Filter Select Register -- Index 8Eh ................................................................32 FAN PME# Enable Register Index 90h ..........................................................................32 FAN Interrupt Status Register Index 91h........................................................................33
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8.2.27 FAN Real Time Status Register Index 92h .....................................................................33 8.2.28 FAN FAULT# Enable Register Index 93h ......................................................................33 8.2.29 Fan Type Select Register -- Index 94h................................................................................33 8.2.30 Fan mode Select Register -- Index 96h...............................................................................34 8.2.31 Auto Fan1 and Fan2 Boundary Hystersis Select Register -- Index 98h .............................34 8.2.32 Auto Fan3 Boundary Hystersis Select Register -- Index 99h .............................................35 8.2.33 Fan1~Fan3 Duty Change Rate Select Register -- Index 9Bh .............................................35 8.2.34 FAN1 and FAN2 START UP DUTY-CYCLE/VOLTAGE Index 9Ch ...........................35 8.2.35 FAN3 START UP DUTY-CYCLE/VOLTAGE Index 9Dh ............................................35 8.2.36 Fan Fault Time Register -- Index 9Fh.................................................................................35 Fan1 Index A0h- AFh........................................................................................................................36 8.2.37 VT1 BOUNDARY 1 TEMPERATURE - Index A6h.........................................................36 8.2.38 VT1 BOUNDARY 2 TEMPERATURE - Index A7...........................................................36 8.2.39 VT1 BOUNDARY 3 TEMPERATURE - Index A8h.........................................................37 8.2.40 VT1 BOUNDARY 4 TEMPERATURE - Index A9...........................................................37 8.2.41 FAN1 SEGMENT 1 SPEED COUNT - Index AAh .......................................................37 8.2.42 FAN1 SEGMENT 2 SPEED COUNT - Index ABh........................................................37 8.2.43 FAN1 SEGMENT 3 SPEED COUNT - Index ACh......................................................38 8.2.44 FAN1 SEGMENT 4 SPEED COUNT - Index ADh .....................................................38 8.2.45 FAN1 SEGMENT 5 SPEED COUNT - Index AEh......................................................38 8.2.46 FAN1 Temperature Mapping Select - Index AFh..........................................................38 Fan2 Index B0h- BFh........................................................................................................................39 8.2.47 VT2 BOUNDARY 1 TEMPERATURE - Index B6h.........................................................39 8.2.48 VT2 BOUNDARY 2 TEMPERATURE - Index B7...........................................................39 8.2.49 VT2 BOUNDARY 3 TEMPERATURE - Index B8h.........................................................39 8.2.50 VT2 BOUNDARY 4 TEMPERATURE - Index B9...........................................................40 8.2.51 FAN2 SEGMENT 1 SPEED COUNT - Index BAh .......................................................40 8.2.52 FAN2 SEGMENT 2 SPEED COUNT - Index BBh........................................................40 8.2.53 FAN2 SEGMENT 3 SPEED COUNT - Index BCh......................................................40 8.2.54 FAN2 SEGMENT 4 SPEED COUNT - Index BDh .....................................................40 8.2.55 FAN2 SEGMENT 5 SPEED COUNT - Index BEh......................................................41 8.2.56 FAN2 Temperature Mapping Select - Index BFh..........................................................41 Fan3 Index C0h- CFh........................................................................................................................41 8.2.57 VT3 BOUNDARY 1 TEMPERATURE - Index C6h.........................................................42 8.2.58 VT3 BOUNDARY 2 TEMPERATURE - Index C7...........................................................42 8.2.59 VT3 BOUNDARY 3 TEMPERATURE - Index C8h.........................................................42 8.2.60 VT3 BOUNDARY 4 TEMPERATURE - Index C9...........................................................42
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8.2.61 8.2.62 8.2.63 8.2.64 8.2.65 8.2.66 8.3.1 8.3.2 8.3.3 8.3.4 8.3.5 8.3.6 8.3.7 8.3.8 8.3.9 8.3.10 8.3.11 8.3.12 8.3.13 8.3.14 8.3.15 8.3.16 8.3.17 8.3.18 8.3.19 8.3.20 8.3.21 8.3.22 8.3.23 8.3.24 8.3.25 8.3.26 8.3.27 8.3.28 8.3.29 FAN3 SEGMENT 1 SPEED COUNT - Index CAh .......................................................43 FAN3 SEGMENT 2 SPEED COUNT - Index CBh........................................................43 FAN3 SEGMENT 3 SPEED COUNT - Index CCh......................................................43 FAN3 SEGMENT 4 SPEED COUNT - Index CDh .....................................................43 FAN3 SEGMENT 5 SPEED COUNT - Index CEh......................................................43 FAN3 Temperature Mapping Select - Index CFh..........................................................43 Loading Gauge Configuration Register Index 01h.........................................................45 Loading Gauge Configuration Register Index 02h.........................................................45 Loading Gauge Reading Register (MSB) Index 03h......................................................45 Loading Gauge Reading Register (LSB) Index 04h ....................................................45 Loading Gauge Limit 1 Register (MSB) Index 05h .......................................................45 Loading Gauge Limit 1 Register (LSB) Index 06h ........................................................46 Loading Gauge Hysteresis 1 Register (MSB) Index 07h................................................46 Loading Gauge Hysteresis 1 Register (LSB) Index 08h.................................................46 Loading Gauge Limit 2 Register (MSB) Index 09h .......................................................46 Loading Gauge Limit 2 Register (LSB) Index 0Ah........................................................46 Loading Gauge Hysteresis 2 Register (MSB) Index 0Bh...............................................46 Loading Gauge Hysteresis 2 Register (LSB) Index 0Ch ................................................46 Loading Gauge Limit 3 Register (MSB) Index 0Dh ......................................................46 Loading Gauge Limit 3 Register (LSB) Index 0Eh ........................................................47 Loading Gauge Hysteresis 3 Register (MSB) Index 0Fh ...............................................47 Loading Gauge Hysteresis 3 Register (LSB) Index 10h.................................................47 Loading Gauge Limit 4 Register (MSB) Index 11h .......................................................47 Loading Gauge Limit 4 Register (LSB) Index 12h ........................................................47 Loading Gauge Hysteresis 4 Register (MSB) Index 13h................................................47 Loading Gauge Hysteresis 4 Register (LSB) Index 14h.................................................47 Loading Gauge Section Mapping Register 1 Index 15h..................................................47 Loading Gauge Section Mapping Register 2 Index 16h.................................................48 Loading Gauge Section Mapping Register 3 Index 17h.................................................48 Loading Gauge Real Time Status Register Index 18h ....................................................48 Loading Gauge PME status register Index 20h ..............................................................48 Loading Gauge PME Control register Index 21h ...........................................................48 Loading Gauge Stop Time Control register Index 22h...................................................48 Loading Gauge Hysteresis Timeout Control register Index 23h ....................................49 Loading Increasing Control register 1 Index 25h ............................................................49
8.3.30 Loading Increasing Control register 2 Index 26h ............................................................49 8.3.31 Loading Gauge Sorting & One Shot Control register Index 30h....................................49
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8.4.1 VID Configuration Register Index 01h...........................................................................50 8.4.2 VID Configuration Register Index 02h...........................................................................50 8.4.3 VID_IN Reading Register Index 03h .............................................................................50 8.4.4 VID Manual Register Index 04h.....................................................................................50 8.4.5 VID Offset Register 1 Index 05h .....................................................................................50 8.4.6 VID Offset Register 2 Index 06h .....................................................................................50 8.4.7 VID Offset Register 3 Index 07h ....................................................................................51 8.4.8 VID Offset Register 4 Index 08h ....................................................................................51 8.4.9 VID Offset Register 5 Index 09h ....................................................................................51 8.4.10 VID Watchdog Timer Configuration Register Index 0Ah ..............................................51 8.4.11 VID Watchdog Time Register Index 0Bh ........................................................................51 8.4.12 VID Switch Control Register Index 0Ch .........................................................................51 8.4.13 VID_IN/VID_OUT Function Select Register Index 0Dh ...............................................52 9. Electrical Characteristics ..............................................................................................................53 9.1 Absolute Maximum Ratings .......................................................................................................53 9.2 DC Characteristics ......................................................................................................................53 10. Ordering Information ....................................................................................................................54 11. Package Dimensions .....................................................................................................................55 12. Application Circuit........................................................................................................................56
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1. General Description
The F75334DG is an integrated performance control IC. The F75334DG integrated Hardware Monitor, PWM Loading Gauge, VID controller and GPIO functions inside. Part of the Hardware Monitor is for system protection including 6 channels voltage monitor, 4 sets dual current sources temperature sensor, 3 sets fan speed sensor and controller. Besides, provides Intel new generational temperature interfaces PECI/SST for temperature reading and also supports AMDSI interface for AMD series CPU temperature reading. PWM Loading Gauge is sensing the PWM signal change of duty cycle to react related functions for over/under-clocking application. VID controller is the dynamic voltage ID controller chip to provide the advanced CPU voltage programming when over/under clocking. The dynamic VID spec. is for new generation Intel/AMD CPU and also compatible to VRM9.0/VRM10.0/VRM10.X /VRM11.0 spec.. Additionally, the F75334DG provides easy voltage sensor input/output (VSI/VSO) function to sense Vcore voltage, then output the offset voltage for over/under voltage change use. Otherwise, F75334DG provides 21 GPIO pins for flexible application. The F75334DG supports three main features for system protection, system over/under-clocking and dynamic voltage ID control. The F75334DG can easy save total cost and improve system performance. Especially the Loading Gauge feature will achieve multi-steps dynamic over/under-clocking being easy function. The F75334DG support 2 wire I2C interface, packaged in 48-pin LQFP green package and powered by 3.3V.
2. Feature List
General Functions Support 6 channels voltage monitor Provide 4 temperature sensors Support 3 sets fan control Loading gauge for device loading sensing Provide VID controller with OTF 21 GPIO pins for flexible application Easy voltage sensor I/O (VSI/VSO) for easy over/under voltage change use. Support Intel PECI/SST interfaces for temperature reading. Support AMDSI interface for temperature reading. 2 wire I2C interface 3VCC operation and packaged in 48-LQFP green package
Hardware Monitor Voltage Monitor
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1. Provide 2.048V VREF 2. Support 6 channels voltage monitor(VCC3 V + VSB3V + 4 Externals) 3. Voltage monitor resolution is 8mv per LSB 4. Support 8bits high limit and low limit for each voltage channel Temperature Monitor 1. Support 4 temperature sensor (1 local + 3 remote) 2. Remote sensors support 2 types sensor (thermistor and transistor/thermal diode(Default)) 3. 1C accuracy on remote channel (60C ~ 100C) 4. 3C accuracy on local channel (60C ~ 100C) 5. Support temperature range from -25C ~ 145C 6. Support high limit for each temperature sensor 7. Support OVT( over temperature) limit for each temperature sensor 8. Each temperature with hysteresis for high limit and OVT limit ( 0C~15C) Fan Controller and Monitor 1. Support 3 sets fan speed sensor and fan control 2. 50K fan speed sampling rate 3. Support Intel 4-Fan control mode
(1. Auto RPM Mode 2. Auto Duty Mode(Default) or manual duty 3. Manual RPM)
Loading Gauge Provide 1 PWMIN detection pins Duty cycle reading resolution is 16bits Support 4 duty limit ( 5 segments), and the resolution is 12 bits Support 4 hysteresis registers for each limit ( offset) Support 3 TURBO# output signals to control CLK Gen. Support 1 STOP# output signal to chipset ( Timing flexible)
VID controller Support VRM9.0, VRM10.0, VRM10 extend and VRM11.0 Support 5 offset registers to mapping 5 different loading range Support Intel and AMD CPU Easy voltage sensor I/O (VSI/VSO) for easy over/under voltage change use. GPIO Support 21 GPIO pins Only support level mode GP output control GPIO pin status can be read by registers
Noted: Patented TWI235553 TWI263778 2 July, 2007 V0.25P
F75334
3. Key Specification
Supply Voltage Operating Supply Current 3.0V to 3.6V 2.5 mA typ.
4. Block Diagram
Power Supply PWM Controller VID Controller CPU (Device)
CPU Loading Gauge sensor
CLK Gen.
Chipset Hardware Monitor
Device or system temperature
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5. Pin Configuration
F75334DG
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6. Pin Description
I/OD12st I/O12st I/OOD12st I/OOD12lv ILv/OD8-S1 ILv/OD12 OD12 OOD12 INst INlv AIN AOUT P - TTL level bi-directional pin with schmitt trigger, Open-drain output with12 mA sink capability. - TTL level bi-directional pin with schmitt trigger and with 12mA source-sink capability. - TTL level bi-directional pin with schmitt trigger, Output pin with 12mA source-sink capability, and can programming to open-drain function. - Low level bi-directional pin, Output pin with 12mA source-sink capability, and programming to open-drain function. - Low level bi-directional pin (VIH capability. - Low level bi-directional pin (VIH 0.9V, VIL 0.6V.). Output with 12mA sink capability. - Open-Drain output pin with 12mA sink capability. - Output pin with 12mA source-sink capability, and can programming to open-drain function. - TTL level input pin with schmitt trigger. - Low level input pin - Input pin(Analog). - Output pin(Analog). - Power. 0.9V, VIL 0.6V.). Output with 8mA drive and 1mA sink can
6.1
Power Pin
Type P P P Description 3.3V Standby Power 3.3V VCC Power Ground
Pin No. Pin Name 15 44 6 VSB VCC GND
6.2
Pin No. 1 2 3, 4, 5 7
Hardware Monitor Pin
Pin Name VREF DD0+ ~ D2+ OVT# Type AOUT AIN AIN I/OD12st PWR VCC3V VCC3V VCC3V VSB3V Description Reference voltage output 2.304V. Temperature sensor ground pin. CPU thermal diode/transistor temperature sensor input. Over temperature signal output. Default open drain active-low output. This pin will be a logic LOW when the temperature exceeds its limit. Default output enable when the temperature exceeds 100C on initial. Fan fault signal output pin. GPIO pin. PME# signal output pin. System management interrupt (Pure open drain). This pin will be active low when there is something wrong with voltage, 5 July, 2007 V0.25P
12
FAN_FAULT# GPIO12 PME#
OD12 I/OOD12st OD12
VSB3V
F75334
13 GPIO13 FAN_FAULT# SST AMDSI_CLK 30 31 FAN_IN1 FAN_CTL1 I/OOD12st OD12 ILv/OD8-S1 OD12 INst OOD12 AOUT 32 33 FAN_IN2 FAN_CTL2 INst OOD12 AOUT INst I/OOD12st OOD12 AOUT GPIO43 45 - 48 VIN1 ~ VIN4 I/OOD12st AIN VCC3V VSB3V temperature and fan. See register description index 33h. GPIO pin. Fan fault signal output pin. Intel SST hardware monitor interface. Clock output for AMD SI interface. VCC3V Fan 1 tachometer input. (5V-tolerance) VCC3V Use PWM duty cycle to control fan1 speed. (5V-tolerance) Use linear voltage output (0~3.3V) to control fan1 speed. VCC3V Fan 2 tachometer input. (5V-tolerance) VCC3V Use PWM duty cycle to control fan2 speed. (5V-tolerance) Use linear voltage output (0~3.3V) to control fan2 speed. Fan 3 tachometer input. VCC3V (5V-tolerance) GPIO pin. Use PWM duty cycle to control fan3 speed. VCC3V Use linear voltage output (0~3.3V) to control fan3 speed. GPIO pin. Voltage monitor pin1~4. ( 0V ~ 2.048V)
42 43
FAN_IN3 GPIO42 FAN_CTL3
6.3
VID Controlling Pin
Type OD12 OD12 I/OOD12st INlv I/OOD12lv INlv INst OD12st PWR VCC3V VCC3V VCC3V Description CPU VID output pin CPU VID output pin GPIO pin CPU VID input pins. Special level input VIH 0.9, VIL GPIO pin CPU VID input pins. Special level input VIH 0.9, VIL CPU SLOTOCC# input. Reset out signal output.
Pin No. Pin Name 17-18 VIDOUT[7:6] 19-24 VIDOUT[5:0] GPIO2[0:5] 39-34 VIDIN[5:0] GPIO3[5:0] VIDIN[7:6] SLOTOCC# RSTOUT#
0.6.
41-40 8 9
VCC3V VSB3V VSB3V
0.6.
6.4
Loading Gauge Pin
Type AIN I/OOD12st OD12 AOUT I/OOD12st OD12 I/OOD12st OD12 VSB3V PWR VSB3V Description Voltage sensor input for Vcore voltage sensing. GPIO pin. LED flashing pin. Voltage sensor output for over/under voltage use. GPIO pin. BEEP pin. GPIO pin. Turbo 2 pin for CLK Gen over/under clocking.
Pin No. Pin Name 10 VSI GPIO10 11 LED VSO GPIO11 BEEP 14 GPIO14 LG_TURBO2#
VSB3V
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16 25 26 27 28 29 LG_PWMIN SCL SDA LG_TURBO0# LG_TURBO1# GPIO40 LG_STOP# GPIO41 PECI AMDSI_DAT INst INst I/OD12st O12 OD12 I/OOD12st OD12 I/OOD12st ILv/OD8-S1 ILv/OD12 VCC3V VCC3V (5V-tolerance) VCC3V (5V-tolerance) VCC3V (5V-tolerance) VCC3V VCC3V PWM duty cycle sensing pin. Serial clock input pin. Serial data pin. Turbo 0 pin for CLK Gen over/under clocking. Turbo 1 pin for CLK Gen over/under clocking. GPIO pin. Stop signal for chipset use. GPIO pin. Intel PECI hardware monitor interface. AMD SI data interface.
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7. Function Description
The F75334DG provides a pin27 for functions/addresses trapping. Remember to select the function/address before you implement this chip. Trapping table is as below.
Pull down 4.7k (00) 8'h66 DC (linear fan) PWM_IN# Pull down 200k (10) 8'h6A DC (linear fan) PWM_IN# Pull up 200k (11) 8'h6C PWM fan control PWM_IN Pull up 4.7k (01) 8'h68 PWM fan control PWM_IN
I2C address Fan type Pwm polarity
7.1
Hardware monitor
For the 8-bit ADC has the 8mv LSB, the maximum input voltage of the analog pin is
2.048V. Therefore the voltage under 2.048V (ex:1.5V) can be directly connected to these analog inputs. The voltage higher than 2.048V should be reduced by a factor with external resistors so as to obtain the input range. Only 3Vcc is an exception for it is main power of the F75334DG. Therefore 3Vcc can directly connect to this chip's power pin and need no external resistors. There are two functions in this pin with 3.3V. The first function is to supply internal analog power of the F75334DG and the second function is that voltage with 3.3V is connected to internal serial resistors to monitor the +3.3V voltage. The internal serial resistors are two 150K ohm, so that the internal reduced voltage is half of +3.3V. There are four voltage inputs in the F75334DG and the voltage divided formula is shown as follows:
VIN = V+12V x
R2 R1 + R2
where V+12V is the analog input voltage, for example.
If we choose R1=27K, R2=5.1K, the exact input voltage for V+12v will be 1.907V, which is within the tolerance. As for application circuit, it can be refer to the figure shown as follows.
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3Vcc Voltage Inputs VIN (Lower than 2.048V) VIN(Higher than R1 R2 (directly connect to the chip) (directly connect to the chip) VIN1(Max2.048V) 150K VIN3.3 150K
VREF Pin 1 R 10K, 1% Pin 3, 4 or 5 Typical BJT Connection 2N3906 D+ D-
8-bit ADC with 8 mV LSB
RTHM
10K, 25 C
Typical Thermister Connection
Fig 7-1
SMI# interrupt for voltage is shown as figure. Voltage exceeding or going below high limit will cause an interrupt if the previous interrupt has been reset by writing "1" all the interrupt Status Register. Voltage exceeding or going below low limit will result the same condition as voltage exceeding or going below high limit.
(pulse mode) (level mode)
*
*
*
*
*
*
*
*
*Interrupt Reset when Interrupt Status Registers are written 1 Voltage SMI# Mode
Fig 7-2
The F75334DG monitors a local and three remote temperature sensors. Both can be measured from -25C to 145C. The temperature format is as the following table:
MSB LSB Sign bit
X
00000000_001xxxx0 10000000_001xxxx0 10010001_111xxxx0 11010000_111xxxx0 0.125 128.125 145.785 208.785 (145.785 + 63) (offset)
X
X
X
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11111111_111xxxx1 11011011_111xxxx1 11010000_111xxxx1 - 0.125 - 25.125 -48.125 (-25.125 - 23) (offset)
Remote-sensor transistor manufacturers
Manufacturer Panasonic Philips Model Number 2SB0709 2N3906 PMBT3906
Monitor Temperature from "thermistor" The F75334DG can connect three thermistor to measure environment temperature or remote temperature. The specification of thermistor should be considered to (1) value is 3435K (2) resistor value is 10K ohm at 25C. In the Figure 7-1, the thermistor is connected by a serial resistor with 10K ohm, then connected to VREF.
Monitor Temperature from "thermal diode" Also, if the CPU, GPU or external circuits provide thermal diode for temperature measurement, the F75334DG is capable to these situations. The build-in reference table is for PNP 2N3906 transistor, and each different kind of thermal diode should be matched with specific BJT gain. In the Figure 7-1, the transistor is directly connected into temperature pins.
ADC Noise Filtering The ADC is integrating type with inherently good noise rejection. Micro-power operation places constraints on high-frequency noise rejection; therefore, careful PCB board layout and suitable external filtering are required for high-accuracy remote measurement in electronically noisy environment. High frequency EMI is best filtered at D+ and D- with an external 2200pF capacitor. Too high capacitance may introduce errors due to the rise time of the switched current source. Nearly all noise sources tested cause the ADC measurement to be higher than the actual temperature, depending on the frequency and amplitude.
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Over Temperature Signal (OVT#) OVT# alert for temperature is shown as figure 7-3. When monitored temperature exceeds the over-temperature threshold value, OVT# will be asserted until the temperature goes below the hysteresis temperature.
To
THYST
OVT#
Fig 7-3
Temperature PME# PME# interrupt for temperature is shown as figure 7-4. Temperature exceeding high limit or going below hysteresis will cause an interrupt if the previous interrupt has been reset by writing "1" all the interrupt Status Register.
To
T HYST
SMI# (pulse mode) (level mode active low) * * * *
*Interrupt Reset when Interrupt Status Registers are written 1
Fig 7-4
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Fan speed count Inputs are provided by the signals from fans equipped with tachometer outputs. The level of these signals should be set to TTL level, and maximum input voltage cannot be over 5V. If the input signals from the tachometer outputs are over the 5V, the external trimming circuit should be added to reduce the voltage to obtain the input specification. The normal circuit and trimming circuits are shown as follows:
+12V Pull-up resister 4.7K Ohms Pull-up resister < 1K or totem-pole output +12V FAN Out GND 10K 22K~30K Fan Input +12V FANIN 1 FAN Out GND > 1K
+12V
Fan Input
FANIN 1
F75334DG
3.3V Zener
FAN Connector
F75334DG
Fan with Tach Pull-Up to +12V, or Totern-Pole Output and Register Attenuator
Fan with Tach Pull-Up to +12V, or Totem-Pole Putput and Zener Clamp
Fig 7-5 / 7-6
+5V Pull-up resister 4.7K Ohms
+5V
Pull-up resister < 1K or totem-pole output +5V FAN Out GND 10K 1K~2.7K Fan Input +5V FANIN1 FAN Out GND > 1K
Fan Input
FANIN1
F75334DG
3.3V Zener
FAN Connector
F75334DG
Fan with Tach Pull-Up to +5V, or Totern-Pole Output and Register Attenuator
Fan with Tach Pull-Up to +5V, or Totem-Pole Putput and Zener Clamp
Fig 7-7 / 7-8
Determine the fan counter according to:
Count = 1.5 x 10 6 RPM
In other words, the fan speed counter has been read from register, the fan speed can be
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evaluated by the following equation. As for fan, it would be best to use 2 pulses tachometer output per round.
RPM = 1.5 x 10 6 Count
Fan speed control The F75334DG provides 2 fan speed control methods: 1. LINEAR FAN CONTROL 2. PWM DUTY CYCLE
Linear Fan Control The range of DC output is 0~3.3V, controlled by 8-bit register. 1 LSB is about 0.013V. The output DC voltage is amplified by external OP circuit, thus to reach maximum FAN OPERATION VOLTAGE, 12V. The output voltage will be given as followed:
Programmed 8bit Register Value 255
Output_voltage (V) = 3.3 x
And the suggested application circuit for linear fan control would be:
12V
3 DC OUTPUT VOLTAGE 2
8
+ 4
1 LM358
PMOS D1 1N4148 R 4.7K JP1
R 10K
C 47u
3 2 1 CON3
R 27K FANIN MONITOR C 0.1u R 10K
R 3.9K
DC FAN Control with OP
Fig 7-9
PWM duty Fan Control The duty cycle of PWM can be programmed by a 8-bit register. The default duty cycle is set to 100%, that is, the default 8-bit registers is set to FFh. The expression of duty can be
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represented as follows.
Duty_cycle(%) =
+12V
Programmed 8bit Register Value x 100% 255
+5V
R1 R2 D G PWM Clock Input NMOS S + C FAN PWM Clock Input G PNP Transistor
R1 R2 D NMOS S + C FAN PNP Transistor
Fig 7-10
Fan speed control mechanism There are some modes to control fan speed and they are 1. Auto RPM Mode 2. Auto Duty Mode(Default) or manual duty 3. Manual RPM. More detail please refer register description.
Manual mode For manual mode, it generally acts as software fan speed control.
Temperature mode
At this mode, the F75334DG provides automatic fan speed control related to temperature variation of CPU/GPU or the system. The F75334DG can provide four temperature boundaries and five intervals, and each interval has its related fan speed count. All these values should be set by BIOS first. Take figure 7-11 as example. When temperature boundaries are set as 45, 55, 65, and 75C and there are five intervals (each interval is 10C). The related desired fan speed counts for each interval are 0500h, 0400h, 0300h, 0200h and 0100h. When the temperature is within 55~65C, the fan speed count 300h will be load into FAN EXPECT COUNT that define in registers. Then, the F75334DG will adjust PWMOUT duty-cycle to meet the expected value. It can be said that the fan will be turned on with a specific speed set by BIOS and automatically controlled with the temperature variation. The F75334DG will take charge of all the fan speed control and need no software support.
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Desired Counts 75 Degree C 65 Degree C 0300h 55 Degree C 0400h 45 Degree C 0500h 0100h 0200h
Figure 7-11
PWMOUT Duty-cycle operating process In both "Manual RPM" and "Temperature RPM" modes, the F75334DG adjust PWMOUT duty-cycle according to current fan count and expected fan count. It will operate as follows: (1). When expected count is 0xFFF, PWMOUT duty-cycle will be set to 0x00 to turn off fan. (2). When expected count is 0x000, PWMOUT duty-cycle will be set to 0xFF to turn on fan with full speed. (3). If both (1) and (2) are not true, (4). When PWMOUT duty-cycle decrease to MIN_DUTY( 00h), obviously the duty-cycle will decrease to 00h next, the F75334DG will keep duty-cycle at 00h for 1.6 seconds. After that, the F75334DG starts to compare current fan count and expected count in order to increase or decrease its duty-cycle. This ensures that if there is any glitch during the period, the F75334DG will ignore it.
Start Duty Stop Duty
Fig 7-12
FAN_FAULT# Fan_Fault# will be asserted when the fan speed doesn't meet the expected fan speed within a programmable period (default is 11 seconds) or when fan stops with respect to PWM duty-cycle which should be able to turn on the fan. There are two conditions may cause the FAN_FAULT# event. (1). When PWM_Duty reaches 0xFF, the fan speed count can't reach the fan expected
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count in time. (Figure 7-13)
11 sec(default) Current Fan Count
Expected Fan Count
100% Duty-cycle Fan_Fault#
Fig 7-13
(2). After the period of detecting fan full speed, when PWM_Duty > Min. Duty, and fan count still in 0xFFF.
7.2
Loading Gauge
F75334DG support 16 bit PWM duty reading value and four duty limits (12 bits) for auto
control system performance.
Hyst4 limit4 Hyst3 limit3
Duty_Cycle_Reading[15:4]
limit2 Hyst2 limit1 Hyst1
STATE_AUTO
2
3
4
3
2
1
0
1
Fig 7-14
F75334DG support three turbo# pin to over or under clocking, when F7334DG detect CPU loading it will output relative turbo# value that define in internal register. (Fig 7-15)
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TURBO_MAP_EN
TURBO
TURBO_SEC0[2:0] | TURBO_SEC4[2:0]
MAPPING
STATE[2:0]
TURBO_N[2:0]
STATE_AUTO[2:0]
MUX
STATE_MANUAL[2:0
TABLE
MANUAL_EN
Fig 7-15
When under clocking F75334DG will decrease system frequency after 20ms it start to change VID value to deduce CPU Vcore voltage, In order to prevent chipset fail during frequency change, F75334DG use STOP# signal to disable chipset temporarily.
OVER CLKING STATE_AUTO STOP#
2
3
4
3
2
30ms + 5*stop time sel
TURBO#
2 2
3 3
4 4
3 3
20ms
2 2
VID_OFFSET_SEL
Fig 7-16
7.3
VID on the fly control
1. Support VRM9.0, VRM10.0, VRM10 extend and VRM11.0 2. Support 5 offset registers to mapping 5 different loading (PWM duty) ranges.
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CPU_SEL[2:0]]
MANUAL_MODE OTF_EN
VID OTF Controller
VID_IN[7:0]
INTEL_VRM10.0 INTEL_VRM10.0 Extend
VID_OFFSET0[7:0]
MUX
VID_OFFSET[7:0]
INTEL_VRM11.0
VID_OUT[7:0]
AMD VRM
OFFSET_SEL [2:0]
VID_MANUAL[7:0]
AMD VRM Extend
WD_TMOUT
VID Module
VID_WatchDog Timer
Fig 7-17
7.4
BEEP
Other
BEEP pin is power by standby power; it will be alerted by two conditions 1. over
temperature shutdown. 2. over loading shutdown. When enable over temperature shutdown function and the OVT# event turn-off the system power VCC then BEEP will output 833Hz/416Hz clock (Fig 7-18)
ovt_shutdown_enable OVT# BEEP#
833Hz 416Hz 833Hz 416Hz
VCC3V
Fig 7-18
When enable over loading shutdown function and the TURBO2# event turn-off the
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system power VCC then BEEP will output 833Hz/416Hz clock (Fig 7-19)
Turbo_shutdown_enable Turbo[2]# beep
833Hz 416Hz 833Hz 416Hz
vcc3v
Fig 7-19
LED When normal operation LED pin will output relative frequency for different CPU/GPU loading (Fig 7-20),
Vcc3vok LG_limit3_exc LG_limit2_exc LG_limit1_exc LG_limit0_exc LED 0.15Hz 0.3125Hz
Fig 7-20
0.625Hz
1.25Hz
2.5Hz
But if over temperature shutdown function is enabled and after the system power turn-off then the LED pin will output 0.625Hz clock(Fig 7-21),
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OVT_shutdown_enable OVT# LED
0.625Hz
VCC3V
Fig 7-21
If over loading shutdown function is enabled then after the system power shutdown then the LED pin will output 0.312Hz clock(Fig 7-22),
Turbo_shutdown_enable Turbo[2]# LED
0.312Hz
vcc3v
Fig 7-22
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8. Register Description
8.1 Global Registers
8.1.1 Configuration Register Index 00h Bit 7 6 5-3 Name SOFT_RST POWR_DOWN Reserved R/W Default R/W R/W R 0 0 0h 3h 0 DEVICE_SEL R/W Set 1 to reset whole chip. Set 1 to power down whole chip. Reserved/ Device select: 2'b00: Select to hardware monitor module. 2'b01: Select to loading gauge module. 2'b10: Select to VID control module. 2'b11: Select to global function. Description
8.1.2 Global function Configuration Register Index 01h Bit 7 6 5 Name ARA_EN PME_POLARITY PME_MODE R/W Default R/W R/W R/W 0 0 0 1 4 3-0 GLOBAL_PME_EN Reserved R/W -0h Description Enable ARA mode, when F75334DG receive ARA command will auto clear GLOBAL_PME_EN bit (CR01 bit 4) 0: PME event will be low active. 1: PME event will be high active. 0: pulse mode (pulse width 120us) 1: level mode. Set 1 to enable PME event output function, if clear to 0 the PME output function will be disable. When ARA mode is enabled and F75334DG receive an ARA command then this bit will be auto clear. Reserved
8.1.3 Global PME Status Register Index 02h Bit 7-4 3 2 1 0 Name Reserved LG_PME FAN_PME VOLTAGE_PME TEMP_PME R/W Default -R R R 0h 0 0 0 -Loading gauge events are asserted. After users clear Loading gauge PME status, this bit will return to 0. Hardware monitor fan events are asserted. After users clear hardware monitor fan PME status, this bit will return to 0. Hardware monitor voltage events are asserted. After users clear hardware monitor voltage PME status, this bit will return to 0. Hardware monitor temperature events are asserted. After users clear hardware monitor temperature PME status, this bit will return to 0. Description
R
0
8.1.4 Global PME Status Register Index 03h (Power by VSB3V) Bit 7-6 Name Reserved R/W Default -0h -Description
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5 4 3 2 1 0 Reserved R/W 0h 0 0 0 0 Dummy register. Enable internal over temperature (OVT) event or OVT# pin input to disable turbo function. Loading gauge events are asserted. After users clear Loading gauge PME status this bit will return to 0. Hardware monitor fan events are asserted. After users clear hardware monitor fan PME status this bit will return to 0. Hardware monitor voltage events are asserted. After users clear hardware monitor voltage PME status this bit will return to 0. Hardware monitor temperature events are asserted. After users clear hardware monitor temperature PME status this bit will return to 0. OVT_DISTURBO_E R/W N TURBO_SHUTDOWN_E R/W N OVT_SHUTDOWN_EN TURBO_SHUTDOWN OVT_SHUTDOWN R/W R
R
0
8.1.5 GPIO1 Pin Function Select Register Index 04h (Power by VSB3V) Bit Name R/W Default -R/W R/W R/W 0 1 1 1 1 1 GPIO11_EN R/W R/W 0 GPIO10_EN 1 Reserved 1: Pin 14 will be GPIO14. 0: Pin 14 will use as TURBO2# function. 1: Pin 13 will be GPIO13. 0: Pin 13 will use as FAN_FAULT# function. 1: Pin 12 will be GPIO12. 0: Pin 12 will use as PME# function. 1: Pin 11 will be GPIO11. 0: Pin 11 will use as BEEP function. User must disable over_voltage_en bit in VID bank CR0C before use this function. 1: Pin 10 will be GPIO10 0: Pin 10 will use as LED function User must disable over_voltage_en bit in VID bank CR0C before use this function. Description 7-5 Reserved 4 3 2 GPIO14_EN GPIO13_EN GPIO12_EN
8.1.6 GPIO2/GPIO3 Pin Function Select Register These function select registers please refer VID bank registers.
8.1.7 GPIO4 Pin Function Select Register Index 07h Bit Name R/W Default -R/W R/W R/W R/W 0h 0 0 0 0 -1: pin 43 will be GPIO43. 0: Pin 43 will use as FAN_CTRL3 function. 1: pin 42 will be GPIO42. 0: Pin 42 will use as FAN_IN3 function. 1: pin 29 will be GPIO41. 0: Pin 29 will use as STOP# function. 1: pin 28 will be GPIO40. 0: Pin 28 will use as TURBO1# function. Description 7-4 Reserved 3 2 1 0 GPIO43_EN GPIO42_EN GPIO41_EN GPIO40_EN
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8.1.8 GPIO1X Output Data Register Index 10h (Power by VSB3V) Bit 7-5 4-0 Name Reserved GPIO1X_DATA R/W Default -R/W 0h 0h -GPIO14~GPIO10 output data, when output function was enable, the data set in these registers will be output. Description
8.1.9 GPIO1X Output Data Enable Register Index 11h (Power by VSB3V) Bit 7-5 4-0 Name Reserved GPIO1X_OUT_EN R/W Default -R/W 0h 0h -GPIO14~GPIO10 output control pins, when set to 1 the relative pin output function will be enable. Description
8.1.10 Bit 7-5 4-0
GPIO1X Output Mode Select Register Index 12h (Power by VSB3V) Name R/W Default -R/W 0h 0h -0: for open drain 1: for push pull Description
Reserved GPIO1X_O_MODE
8.1.11 Bit 7-5 4-0
GPIO1X Pin Status Register Index 13h (Power by VSB3V) Name R/W Default -R 0h --These registers are read only, they reflect the relative pin real status Description
Reserved GPIO1_PIN_ST
8.1.12 Bit 7-6 5-0
GPIO2X Output Data Register Index 14h (Power by VSB3V) Name R/W Default -R/W 0h 0h -GPIO25~GPIO20 output data, when output function was enable, the data set in these registers will be output. Description
Reserved GPIO2X_DATA
8.1.13 Bit 7-6 5-0
GPIO2X Output Data Enable Register Index 15h (Power by VSB3V) Name R/W Default -R/W 0h 0h -GPIO25~GPIO20 output control pins, when set to 1 the relative pin output function will be enable. Description
Reserved GPIO2X_OUT_EN
8.1.14 Bit 7-6 5-0
GPIO2X Output Mode Select Register Index 16h (Power by VSB3V) Name R/W Default -R/W 0h 0h -0: for open drain 1: for push pull Description
Reserved GPIO2X_O_MODE
8.1.15 Bit 7-6
GPIO2X Pin Status Register Index 17h (Power by VSB3V) Name R/W Default -0h -Description
Reserved
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5-0 GPIO2_PIN_ST R -These registers are read only, they reflect the relative pin real status 8.1.16 Bit 7-6 5-0 GPIO3X Output Data Register Index 18h (Power by VSB3V) Name Reserved GPIO3X_DATA R/W Default -R/W 0h 0h -GPIO35~GPIO30 output data, when output function was enable, the data set in these registers will be output. Description
8.1.17 Bit 7-6 5-0
GPIO3X Output Data Enable Register Index 19h (Power by VSB3V) Name R/W Default -R/W 0h 0h -GPIO35~GPIO30 output control pins, when set to 1 the relative pin output function will be enable. Description
Reserved GPIO3X_OUT_EN
8.1.18 Bit 7-6 5-0
GPIO3X Output Mode Select Register Index 1Ah (Power by VSB3V) Name R/W Default -R/W 0h 0h -0: for open drain 1: for push pull Description
Reserved GPIO3X_O_MODE
8.1.19 Bit 7-6 5-0
GPIO3X Pin Status Register Index 1Bh (Power by VSB3V) Name R/W Default -R 0h --These registers are read only, they reflect the relative pin real status Description
Reserved GPIO3_PIN_ST
8.1.20 Bit 7-2 1-0
OVT and Fan_Fault Pin Select Register Index 1Ch (Power by VSB3V) Name R/W Default -R/W 0h 01b -00: Disable function output 01: Pin7 will be a OVT function pin 10: Pin7 will be a Fan_Fault function pin 11: Pin7 will be a OVT + Fan_Fault functions pin Description
Reserved Pin_Select
8.1.21 Bit 7-4 3-0
GPIO4X Output Data Register Index 20h Name R/W Default R/W 0 -GPIO43~GPIO40 output control pins, when set to 1 the relative pin output function will be enable. Description
Reserved GPIO4_DATA
8.1.22 Bit 7-4 3-0
GPIO4X Output Data Enable Register Index 21h Name R/W Default R/W 0 -GPIO43~GPIO40 output control pins, when set to 1 the relative pin output function will be enable. Description
Reserved GPIO4_OUT_EN
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8.1.23 Bit 7-4 3-0 GPIO4X Output Mode Select Register Index 22h Name Reserved R/W Default 0 -0: for open drain 1: for push pull Description
GPIO4_OUT_MODE R/W
8.1.24 Bit 7-4 3-0
GPIO4X Pin Status Register Index 23h Name R/W Default R --These registers are read only, they reflect the relative pin real status Description
Reserved GPIO4_PIN_ST
8.1.25 Bit
CHIPID(1) Register - Index 5Ah Name R/W Default RO 04h Chip ID, High byte (8'h04). Description
7-0 CHIPID
8.1.26 Bit
CHIPID(2) Register - Index 5Bh Name R/W Default RO 14h Chip ID, Low byte (8'h14). Description
7-0 CHIPID
8.1.27 Bit 7-0
VENDOR ID(1) Register - Index 5Dh Name R/W Default R/W 19h Vendor ID, high byte (8'h19) Description
VENDOR1
8.1.28 Bit 7-0
VENDOR ID(2) Register - Index 5Eh Name R/W Default RO 34h Vendor ID, low byte (8'h34) Description
VENDOR2
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8.2 Hardware Monitor Registers
8.2.1
Bit 7-3 2 1 0
Configuration Register Index 01h
Name R/W Default 0h R/W R/W R/W 0 0 1 1 Reserved Hardware monitor function power down. et one to enable startup of fan monitoring operations; a zero puts the part in standby mode. Set one to enable startup of temperature and voltage monitoring operations; a zero puts the part in standby mode. Description
Reserved POWER_DOWN FAN_START V_T_START
8.2.2 Configuration Register Index 02h Bit 7-6 5-4 3-2 1-0 Name Reserved OVT_MODE Reserved F_FAULT_MODE R/W Default R/W R/W R/W R/W 0 0 0 0 Dummy registeres. 00: The OVT# will be low active level mode. 01: The OVT# will be high active level mode. 10: The OVT# will indicate by 1Hz LED function. 11: The OVT# will indicate by (400/800HZ) BEEP output. Dummy registers. 00: The fan fault will be low active level mode. 01: The fan fault will be high active level mode. 10: The fan fault will indicate by 1Hz LED function. 11: The fan fault will indicate by (400/800HZ) BEEP output. Description
8.2.3 PECI SST AMDSI Interface Configuration Register Index 0Ah Bit 7-6 5 4 Name Reserved T1_IIR_EN SST_EN R/W Default R/W R/W R/W 0 1 0 00 3-2 PECI_POWER_SEL R/W 0 1-0 MEAS_TYPE R/W Reserved. Set 1 to enable the IIR for AMDSI/PECI reading. Enable SST Interface. 00: PECI output high level will be 1.23V 01: PECI output high level will be 1.13V 10: PECI output high level will be 1.00V 11: PECI output high level will be 1.00V Select the CPU temperature measure method 00: External thermal diode. 01: PECI interface. 10: AMDSI interface. 11: Reserved. Description
8.2.4 AMDSI Version Register Index 0Bh Bit 7-0 Name AMDSI_VER R/W Default R -
(MEAS_TYPE ==2'b10) Description
When AMDSI interface enable, this will be AMDSI version register. Return the AMDSI version.
8.2.5 Dual Single Core select Register Index 0Bh Bit 7-1 Name Reserved R/W Default R Reserved
(MEAS_TYPE ==2'b01) Description
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0 0 Dual Core_EN R/W When PECI interface enable, this will be Dual Single Core select register. 0: Single Core CPU selection 1: Dual Core CPU selection
8.2.6 TCC Activation Temperature Register Index 0Ch Bit 7-0 Name TCC_TEMP R/W Default R/W 0
(MEAS_TYPE == 2'b01) Description
TCC Activation Temperature. The absolute value of CPU temperature is calculated by the equation: CPU_TEMP = TCC_TEMP + PECI Reading. The range of this register is 0 ~ 255.
8.2.7 AMDSI Node ID Register Index 0Ch Bit 7-0 Name NODE_ID R/W Default R -
(MEAS_TYPE ==2'b10) Description
Return the AMDSI node id.
8.2.8 SST Address Register Index 0Dh Bit 7-0 Name SST_ADDR R/W Default R/W Description 8'h4C Address for SST interface. Programmable.
8.2.9 CPU Temp. Measure Select Register Index 0Eh Bit 7-4 3 Name Reserved ADD R/W Default R/W 000 0 0 Reserved. Temperature scale selection. 1: Temp. Measure = Reading Value + Reading Value* 2-Scale[2:0] 0: Temp. Measure = Reading Value - Reading Value* 2-Scale[2:0] When ADD=1, the Temp. Measure is 000: 1 * Reading Value 001: 3/2 * Reading Value ........ 110: 65/64 * Reading Value 111: 129/128 * Reading Value ------------------------------------------------------------------------When ADD=0, the Temp. Measure is 000: 1 * Reading Value 001: 1/2 * Reading Value ........ 110: 63/64 * Reading Value 111: 127/128 * Reading Value Description
2-0
SCALE[2:0]
R/W
8.2.10 Voltage PME# Enable Register Index 10h Bit 5 4 3 2 1 0 Name EN_VSB3V_PME EN_V4_PME EN_V3_PME EN_V2_PME EN_V1_PME EN_VCC3V_PME R/W Default -R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 Reserved A one enables the corresponding interrupt status bit for PME# interrupt A one enables the corresponding interrupt status bit for PME# interrupt A one enables the corresponding interrupt status bit for PME# interrupt A one enables the corresponding interrupt status bit for PME# interrupt. A one enables the corresponding interrupt status bit for PME# interrupt A one enables the corresponding interrupt status bit for PME# interrupt. Description 7-6 Reserved
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8.2.11 Voltage Interrupt Status Register Index 11h Bit 7-6 5 4 3 2 1 0 Name Reserved VSB3V_EXC_STS V4_ EXC _STS V3_ EXC _STS V2_ EXC _STS V1_ EXC _STS VCC3V_ EXC _STS R/W Default -R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 Reserved This bit is set when the VSB3V is over the high limit or under the low limit. Write 1 to clear this bit, write 0 will be ignored. This bit is set when the VIN3 is over the high limit or under the low limit. Write 1 to clear this bit, write 0 will be ignored. This bit is set when the VIN3 is over the high limit or under the low limit. Write 1 to clear this bit, write 0 will be ignored. This bit is set when the VIN2 is over the high limit or under the low limit. Write 1 to clear this bit, write 0 will be ignored. This bit is set when the VIN1 is over the high limit or under the low limit. Write 1 to clear this bit, write 0 will be ignored. This bit is set when the VCC is over the high limit or under the low limit. Write 1 to clear this bit, write 0 will be ignored. Description
8.2.12 Voltage Exceeds Real Time Status Register 1 Index 12h Bit 7-4 6 5 3 2 1 0 Name Reserved VSB3V_EXC V4_EXC V3_4EXC V2_EXC V1_EXC VCC3V_EXC R/W Default -RO RO RO RO RO RO 0 0 0 0 0 0 0 Description Reserved A one indicates VSB3V exceeds the high or low limit. A zero indicates VSB3V is in the safe region. A one indicates VIN4 exceeds the high or low limit. A zero indicates VIN4 is in the safe region. A one indicates VIN3 exceeds the high or low limit. A zero indicates VIN3 is in the safe region. A one indicates VIN2 exceeds the high or low limit. A zero indicates VIN2 is in the safe region. A one indicates VIN1 exceeds the high or low limit. A zero indicates VIN1 is in the safe region. A one indicates VCC exceeds the high or low limit. A zero indicates VCC is in the safe region.
8.2.13 Voltage Mode select Register Index 13h Bit 7-5 4 3 2-0 Name Reserved V4_LOW_V V3_LOW_V Reserved R/W Default -R/W R/W -0 0 0 0 Reserved Extend voltage 4 reading to 16 bit. Extend voltage 3 reading to 16 bit. Description
8.2.14 Voltage reading and limit Index 20h- 4Fh Address 20h 21h 22h 23h 24h 25h Attribute RO RO RO RO RO RO Default Value ------Description VCC3V reading. The unit of reading is 8mV. V1 reading. The unit of reading is 8mV. V2 reading. The unit of reading is 8mV. V3 reading (MSB). The unit of reading is 8mV. V4 reading (MSB). The unit of reading is 8mV. VSB3V reading. The unit of reading is 8mV.
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26~2Fh 30h 31h 32h 33h 34h 35h 36h 37h 38h 39h 3Ah 3Bh RO R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W FF FFh 00h FFh 00h FFh 00h FFh 00h FFh 00h FFh 00h Reserved VCC3V High Limit. The unit is 8mV. The last LSB bit is fixed to 1'b1. VCC3V Low Limit. The unit is 8mV. The last LSB bit is fixed to 1'b0. V1 High Limit. The unit is 8mV. The last LSB bit is fixed to 1'b1. V1 Low Limit. The unit is 8mV. The last LSB bit is fixed to 1'b0. V2 High Limit. The unit is 8mV. The last LSB bit is fixed to 1'b1. V2 Low Limit. The unit is 8mV. The last LSB bit is fixed to 1'b0. V3 High Limit. The unit is 8mV. The last LSB bit is fixed to 1'b1. V3 Low Limit. The unit is 8mV. The last LSB bit is fixed to 1'b0. V4 High Limit. The unit is 8mV. The last LSB bit is fixed to 1'b1. V4 Low Limit. The unit is 8mV. The last LSB bit is fixed to 1'b0. VSB3V High Limit. The unit is 8mV. The last LSB bit is fixed to 1'b1. VSB3V Low Limit. The unit is 8mV. The last LSB bit is fixed to 1'b0.
8.2.15 Temperature PME# Enable Register Index 60h Bit 7 6 5 4 3 2 1 0 Name EN_ T3_OVT_PME EN_ T2_ OVT_PME EN_ T1_ OVT_PME EN_ L_ OVT_PME EN_ T3_EXC_PME EN_ T2_EXC_PME EN_ T1_EXC_PME EN_L_EXC_PME R/W Default R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 Description A one enables the corresponding interrupt status bit for PME# interrupt A one enables the corresponding interrupt status bit for PME# interrupt. A one enables the corresponding interrupt status bit for PME# interrupt A one enables the corresponding interrupt status bit for PME# interrupt. A one enables the corresponding interrupt status bit for PME# interrupt A one enables the corresponding interrupt status bit for PME# interrupt. A one enables the corresponding interrupt status bit for PME# interrupt A one enables the corresponding interrupt status bit for PME# interrupt.
8.2.16 Temperature Interrupt Status Register Index 61h Bit 7 Name T3_OVT_STS R/W Default 0 R/W 0 6 T2_OVT _STS R/W 0 5 T1_OVT _STS R/W 0 4 LOCAL_OVT _STS R/W 0 3 T3_EXC _STS R/W 0 2 T2_EXC _STS R/W 0 1 T1_EXC _STS R/W Description A one indicates TEMP3 temperature sensor has exceeded OVT limit or below the "OVT limit -hysteresis". Write 1 to clear this bit, write 0 will be ignored. A one indicates TEMP2 temperature sensor has exceeded OVT limit or below the "OVT limit -hysteresis". Write 1 to clear this bit, write 0 will be ignored. A one indicates TEMP1 temperature sensor has exceeded OVT limit or below the "OVT limit -hysteresis". Write 1 to clear this bit, write 0 will be ignored. A one indicates temperature sensor (local temperature) has exceeded the OVT limit or below the "OVT limit -hysteresis". Write 1 to clear this bit, write 0 will be ignored. A one indicates TEMP3 temperature sensor has exceeded high limit or below the "high limit -hysteresis". Write 1 to clear this bit, write 0 will be ignored. A one indicates TEMP2 temperature sensor has exceeded high limit or below the "high limit -hysteresis" limit. Write 1 to clear this bit, write 0 will be ignored. A one indicates TEMP1 temperature sensor has exceeded high limit or below the "high limit -hysteresis" limit. Write 1 to clear this bit, write 0 will be ignored.
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0 0 LOCAL_EXC _STS R/W A one indicates temperature sensor (local temperature) has exceeded the high limit or below the "high limit -hysteresis" limit. Write 1 to clear this bit, write 0 will be ignored.
8.2.17 Temperature Real Time Status Register Index 62h Bit 7 6 5 4 3 2 1 0 Name T3_OVT T2_OVT T1_OVT LOCAL_OVT T3_EXC T2_EXC T1_EXC LOCAL_EXC R/W Default R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 Description Set when the TEMP3 exceeds the OVT limit. Clear when the TEMP3 is below the "OVT limit -hysteresis" temperature. Set when the TEMP2 exceeds the OVT limit. Clear when the TEMP2 is below the "OVT limit -hysteresis" temperature. Set when the TEMP1 exceeds the OVT limit. Clear when the TEMP1 is below the "OVT limit -hysteresis" temperature. Set when the local temperature exceeds the OVT limit. Clear when the local temperature is below the "OVT limit -hysteresis" temperature. Set when the TEMP3 exceeds the high limit. Clear when the TEMP3 is below the "high limit -hysteresis" temperature. Set when the TEMP2 exceeds the high limit. Clear when the TEMP2 is below the "high limit -hysteresis" temperature. Set when the TEMP1 exceeds the high limit. Clear when the TEMP1 is below the "high limit -hysteresis" temperature. Set when the local temperature exceeds the high limit. Clear when the local temperature is below the "high limit -hysteresis" temperature.
8.2.18 OVT Output Enable Register 1 Index 66h Bit 7-6 5 4 3 2 1 0 Name Reserved Reserved Reserved EN_T3_OVT EN_T2_OVT EN_T1_OVT EN_LOCAL_OVT R/W Default R R R R/W R/W R/W R/W 0h 0 0 0 0 1 0 -Reserved Reserved Enable over temperature mechanism of temperature3. Enable over temperature mechanism of temperature2. Enable over temperature mechanism of temperature1. Enable over temperature mechanism of local temperature.. Description
8.2.19 Temperature Sensor Type Register Index 6Bh Bit 7-6 5 4 3 2 1 0 Name Reserved Reserved Reserved T3_MODE T2_MODE T1_MODE LOCAL_T_MODE R/W Default RO RO RO R/W R/W R/W RO 0 0 0 1 1 1 1 -Reserved Reserved 0: TEMP3 is connected to a thermistor 1: TEMP3 is connected to a BJT.(default) 0: TEMP2 is connected to a thermistor. 1: TEMP2 is connected to a BJT. (default) 0: TEMP1 is connected to a thermistor 1: TEMP1 is connected to a BJT.(default) 1: local is connected to a BJT. Description
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8.2.20 LOCAL and TEMP1 Limit Hystersis Select Register -- Index 6Ch Bit 7-4 3-0 Name TEMP1_HYS LOCAL_HYS R/W Default R/W R/W 4h 2h Description TEMP1 will exceeds when over limit until under then "limit - TEMP1_HYS (hystersis)" L TEMP will exceeds when over limit until under then "limit - L TEMP_HYS (hystersis)"
8.2.21 TEMP2 and TEMP3 Limit Hystersis Select Register -- Index 6Dh Bit 7-4 3-0 Name TEMP3_HYS TEMP2_HYS R/W Default R/W R/W 2h 4h Description TEMP3 will exceeds when over limit until under then "limit - TEMP1_HYS (hystersis)" TEMP 2 will exceeds when over limit until under then "limit - L TEMP_HYS (hystersis)"
8.2.22 DIODE OPEN Status Register -- Index 6Fh Bit 7-6 5 4 3 2 1 0 Name Reserved Reserved Reserved T3_DIODE_OPEN T2_DIODE_OPEN T1_DIODE_OPEN T0_DIODE_OPEN R/W Default RO RO RO RO RO RO RO 0h 0h 0h 0h 0h 0h 0h Reserved Reserved Reserved External diode 3 is open or short External diode 2 is open or short External diode 1 is open or short Internal diode 0 is open or short Description
8.2.23 Temperature Index 70h- 8Fh Address 70h Attribute RO Default Value -Description Local temperature[10:3] reading. The unit of reading is 1C.At the moment of reading this register. (when open or short this byte will return 0) CR71 bit7-bit5 are the Local temperature reading value[2:0]. The unit of reading is 0.125C. CR71 bit 0 is the sign bit of the Local temperature. (when open or short this byte will return 1, "sign bit set to 1") Temperature 1 reading. The unit of reading is 1C.At the moment of reading this register. CR73 bit7-bit5 are the temperature 1 reading value[2:0]. The unit of reading is 0.125C. CR73 bit 0 is the sign bit of the temperature 1. (when open or short this byte will return 1, "sign bit set to 1") Temperature 2 reading. The unit of reading is 1C.At the moment of reading this register. CR75 bit7-bit5 are the temperature 2 reading value[2:0]. The unit of reading is 0.125C. CR75 bit 0 is the sign bit of the temperature 2. (when open or short this byte will return 1, "sign bit set to 1") Temperature 3 reading. The unit of reading is 1C.At the moment of reading this register. CR77 bit7-bit5 are the temperature 3 reading value[2:0]. The unit of reading is
71h
RO
--
72h
RO
--
73h
RO
--
74h
RO
--
75h
RO
--
76h 77h
RO RO
---
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78h 79h 7Ah 7Bh 7C-7Fh 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h 8Ah 8Bh 8C~8Dh RO RO RO RO RO R/W R/W R/W R/W R/W R/W R/W R/W RO RO RO RO RO ----FFh 46h 3Ch 64h 55h 64h 55h 55h 46h ----FFH 0.125C. CR77 bit 0 is the sign bit of the temperature 3. (when open or short this byte will return 1, "sign bit set to 1") Reserved Reserved Reserved Reserved Reserved Local Temperature sensor OVT limit. The unit is 1C. Local Temperature sensor high limit. The unit is 1C. Temperature sensor 1 OVT limit. The unit is 1C. Temperature sensor 1 high limit. The unit is 1C. Temperature sensor 2 OVT limit. The unit is 1C. Temperature sensor 2 high limit. The unit is 1C. Temperature sensor 3 OVT limit. The unit is 1C. Temperature sensor 3 high limit. The unit is 1C. Reserved Reserved Reserved Reserved Reserved
8.2.24 Temperature Filter Select Register -- Index 8Eh Bit Name R/W Default Description The queue time for second filter to quickly update values. 00: 8 times. 01: 16 times (default). 10: 24 times. 11: 32 times. The queue time for second filter to quickly update values. 00: 8 times. 01: 16 times (default). 10: 24 times. 11: 32 times. The queue time for second filter to quickly update values. 00: 8 times. 01: 16 times (default). 10: 24 times. 11: 32 times. The queue time for second filter to quickly update values. 00: 8 times. 01: 16 times (default). 10: 24 times. 11: 32 times.
7-6 IIR-QUEUR3
R/W
1h
5-4 IIR-QUEUR2
R/W
1h
3-2 IIR-QUEUR1
R/W
1h
1-0 IIR-QUEUR-LOCAL
R/W
1h
8.2.25 FAN PME# Enable Register Index 90h Bit 5 4 3 Name Reserved Reserved Reserved R/W Default RO RO RO RO 0h 0h 0h 0h Reserved Reserved Reserved Reserved Description 7-6 Reserved
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2 1 0 EN_FAN3_PME EN_FAN2_PME EN_FAN1_PME R/W R/W R/W 0h 0h 0h A one enables the corresponding interrupt status bit for PME# interrupt. A one enables the corresponding interrupt status bit for PME# interrupt A one enables the corresponding interrupt status bit for PME# interrupt.
8.2.26 FAN Interrupt Status Register Index 91h Bit 7-6 5 4 3 2 1 0 Name Reserved Reserved Reserved Reserved FAN3_STS FAN2_STS FAN1_STS R/W Default RO RO RO RO R/W R/W R/W 0h 0h 0h 0h ---Reserved Reserved Reserved Reserved This bit is set when the fan3 count exceeds the count limit. Write 1 to clear this bit, write 0 will be ignored. This bit is set when the fan2 count exceeds the count limit. Write 1 to clear this bit, write 0 will be ignored. This bit is set when the fan1 count exceeds the count limit. Write 1 to clear this bit, write 0 will be ignored. Description
8.2.27 FAN Real Time Status Register Index 92h Bit 7-6 5 4 3 2 1 0 Name Reserved Reserved Reserved Reserved FAN3_EXC FAN2_EXC FAN1_EXC R/W Default -RO RO RO RO RO RO 0h 0h 0h 0h ---Reserved Reserved Reserved This bit set to high mean that fan3 count can't meet expect count over than SMI time(CR9F) or when duty not zero but fan stop over then 3 sec. This bit set to high mean that fan2 count can't meet expect count over than SMI time(CR9F) or when duty not zero but fan stop over then 3 sec. This bit set to high mean that fan1 count can't meet expect count over than SMI time(CR9F) or when duty not zero but fan stop over then 3 sec. Description Reserved
8.2.28 FAN FAULT# Enable Register Index 93h Bit 7 6 5 4 3 2 1 0 Name R/W Default 0 0 0 0 0 0h 0h 0h Description Set one will enable FAN to force full speed when T3 over high limit. Set one will enable FAN to force full speed when T2 over high limit. Set one will enable FAN to force full speed when T1 over high limit. Set one will enable FAN to force full speed when T0 (Local Temperature) over high limit. Reserved A one enables the corresponding interrupt status bit for PME# interrupt. A one enables the corresponding interrupt status bit for PME# interrupt A one enables the corresponding interrupt status bit for PME# interrupt. FULL_WITH_T3_EN R/W FULL_WITH_T2_EN R/W FULL_WITH_T1_EN R/W FULL_WITH_T0_EN R/W Reserved EN_FAN3_ FAULT EN_FAN2_ FAULT EN_FAN1_ FAULT Ro R/W R/W R/W
8.2.29 Fan Type Select Register -- Index 94h Bit 7-6 Name Reserved R/W Default R/W 2'b0S Reserved Description
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5-4 FAN3_TYPE R/W 00: Output PWM mode (pushpull) to control fans. 01: Use linear fan application circuit to control fan speed by fan's power 2'b 0S terminal . 10: Output PWM mode (open drain) to control Intel 4-wire fans. 11: Reserved. 00: Output PWM mode (pushpull) to control fans. 01: Use linear fan application circuit to control fan speed by fan's power 2'b 0S terminal . 10: Output PWM mode (open drain) to control Intel 4-wire fans. 11: Reserved. 00: Output PWM mode (push pull) to control fans. 01: Use linear fan application circuit to control fan speed by fan's power 2'b 0S terminal . 10: Output PWM mode (open drain) to control Intel 4-wire fans. 11: Reserved.
3-2
FAN2_TYPE
R/W
1-0
FAN1_TYPE
R/W
S: Register default values are decided by trapping. 8.2.30 Fan mode Select Register -- Index 96h Bit 7-6 Name Reserved R/W Default R/W 1h Reserved 00: Auto fan speed control, fan speed will follow different temperature by different RPM that define in 0xC6-0xCE. 01: Auto fan speed control, fan speed will follow different temperature by different duty cycle that define in 0xC6-0xCE. 10: Manual mode fan control, user can write expect RPM count to 0xC2-0xC3, and F75334 will auto control duty cycle (PWM fan type) or voltage (linear fan type) to control fan speed. 11: Reserved 00: Auto fan speed control, fan speed will follow different temperature by different RPM that define in 0xB6-0xBE. 01: Auto fan speed control, fan speed will follow different temperature by different duty cycle (voltage) that define in 0xB6-0xBE. 10: Manual mode fan control, user can write expect RPM count to 0xB2-0xB3, and F75334 will auto control duty cycle (PWM fan type) or voltage (linear fan type) to control fan speed. 11: Reserved 00: Auto fan speed control, fan speed will follow different temperature by different RPM that define in 0xA6-0xAE. 01: Auto fan speed control, fan speed will follow different temperature by different duty cycle that define in 0xA6-0xAE. 10: Manual mode fan control, user can write expect RPM count to 0xA2-0xA3, and F75334 will auto control duty cycle (PWM fan type) or voltage(linear fan type) to control fan speed. 11: Reserved Description
5-4
FAN3_MODE
R/W
1h
3-2
FAN2_MODE
R/W
1h
1-0
FAN1_MODE
R/W
1h
8.2.31 Auto Fan1 and Fan2 Boundary Hystersis Select Register -- Index 98h Bit 7-4 Name FAN2_HYS R/W Default 4h R/W 4h 3-0 FAN1_HYS R/W Description 0000: Boundary hysteresis. (0~15 degree C) Segment will change when the temperature over the boundary temperature and below the ( boundary - hysteresis ). 0000: Boundary hysteresis. (0~15 degree C) Segment will change when the temperature over the boundary temperature and below the ( boundary - hysteresis ).
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8.2.32 Auto Fan3 Boundary Hystersis Select Register -- Index 99h Bit 7-4 3-0 Name Reserved S FAN3_HYS R/W Default R/W R/W 2h 2h Reserved 0000: Boundary hysteresis. (0~15 degree C) Segment will change when the temperature over the boundary temperature and below the ( boundary - hysteresis ). Description
8.2.33 Fan1~Fan3 Duty Change Rate Select Register -- Index 9Bh Bit 7-6 5-4 3-2 1-0 Name Reserved FAN3_RATE_SEL FAN2_RATE_SEL FAN1_RATE_SEL R/W Default R/W R/W R/W R/W 0h 0h 0h 0h Reserved x0: Duty change per 200ms, x1: Duty change per Sec. x0: Duty change per 200ms, x1: Duty change per Sec. x0: Duty change per 200ms, x1: Duty change per Sec. Description
8.2.34 FAN1 and FAN2 START UP DUTY-CYCLE/VOLTAGE Index 9Ch Bit Name R/W Default 5h 7-4 FAN2_MIN_DUTY R/W 5h 3-0 FAN1_MIN_DUTY R/W Description When fan start, the FAN_CTRL2 will increase duty-cycle from 0 to this (value x 8) directly. And if fan speed is down, the FAN_CTRL 2 will decrease duty-cycle to 0 when the PWM duty cycle is less than this (value x 4). When fan start, the FAN_CTRL 1 will increase duty-cycle from 0 to this (value x 8 directly. And if fan speed is down, the FAN_CTRL 1 will decrease duty-cycle to 0 when the PWM duty cycle is less than this (value x 4).
8.2.35 FAN3 START UP DUTY-CYCLE/VOLTAGE Index 9Dh Bit Name R/W Default R/W R/W 5h 5h 3-0 FAN3_MIN_DUTY Reserved When fan start, the FAN_CTRL 3 will increase duty-cycle from 0 to this (value x 8 directly. And if fan speed is down, the FAN_CTRL 3 will decrease duty-cycle to 0 when the PWM duty cycle is less than this (value x 4). Description 7-4 Reserved
8.2.36 Fan Fault Time Register -- Index 9Fh Bit 7 6 5 4 Name Reserved R/W Default R/W 0 0 0 0 Reserved Set 1 that fan speed will keep current temp. status before system re-boot up. Set 1 that fan speed will keep current temp. status before system re-boot up. Set 1 that fan speed will keep current temp. status before system re-boot up. Description
FAN3_LD_BEFORE_EN R/W FAN2_LD_BEFORE_EN R/W FAN1_LD_BEFORE_EN R/W
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This register determines the time of fan fault. The condition to cause fan fault event is: When PWM_Duty reaches FFh, if the fan speed count can't reach the fan expect count in time. The unit of this register is 1 second. The default value is 11 seconds. (Set to 0 , means 1 seconds. ; Set to 1, means 2 seconds. Set to 2, means 3 seconds. .... ) Another condition to cause fan fault event is fan stop and the PWM duty is greater than the minimum duty programmed by the register index 97-98h.
3-0 F_FAULT_TIME
R/W
Ah
Fan1 Index A0h- AFh
Address Attribute Default Value Description FAN1 count reading (MSB). At the moment of reading this register, the LSB will be latched. This will prevent from data updating when reading. To read the fan count correctly, read MSB first and followed read the LSB. FAN1 count reading (LSB). RPM mode(CR96 bit0=0): FAN1 expect speed count value (MSB), in auto fan mode (CR96 bit1 0) this register is auto updated by hardware. Duty mode(CR96 bit0=1): This byte is reserved byte. RPM mode(CR96 bit0=0): FAN1 expect speed count value (LSB) or expect PWM duty, in auto fan mode this register is auto updated by hardware and read only. Duty mode(CR96 bit0=1): The Value programming in this byte is duty value. In auto fan mode(CR96 bit1 0) this register is updated by hardware. Ex: 5 5*100/255 % 255 100% FAN1 full speed count reading (MSB). At the moment of reading this register, the LSB will be latched. This will prevent from data updating when reading. To read the fan count correctly, read MSB first and followed read the LSB. FAN1 full speed count reading (LSB).
A0h
RO
8'h0f
A1h
RO
8'hff
A2h
R/W
8'h00
A3h
R/W
8'h01
A4h A5h
R/W R/W
8'h03 8'hff
8.2.37 VT1 BOUNDARY 1 TEMPERATURE - Index A6h Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
6-0 BOUND1TMP1
R/W
st 3Ch The 1 BOUNDARY temperature for VT1 in temperature mode. (60oC) When VT1 temperature is exceed this boundary, FAN1 expect value will load from segment 1 register (index AA)h. When VT1 temperature is below this boundary - hysteresis, FAN1 expect value will load from segment 2 register (index AAh).
8.2.38 VT1 BOUNDARY 2 TEMPERATURE - Index A7 Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
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6-0 BOUND2TMP1 R/W The 2 BOUNDARY temperature for VT1 in temperature mode. 32 (50oC) When VT1 temperature is exceed this boundary, FAN1 expect value will load from segment 2 register (index AB)h. When VT1 temperature is below this boundary - hysteresis, FAN1 expect value will load from segment 3 register (index ABh).
st
8.2.39 VT1 BOUNDARY 3 TEMPERATURE - Index A8h Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
6-0 BOUND3TMP1
R/W
st 28h The 3 BOUNDARY temperature for VT1 in temperature mode. (40oC) When VT1 temperature is exceed this boundary, FAN1 expect value will load from segment 3 register (index AC)h. When VT1 temperature is below this boundary - hysteresis, FAN1 expect value will load from segment 4 register (index ACh).
8.2.40 VT1 BOUNDARY 4 TEMPERATURE - Index A9 Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
6-0 BOUND4TMP1
R/W
st 1Eh The 4 BOUNDARY temperature for VT1 in temperature mode. (30oC) When VT1 temperature is exceed this boundary, FAN1 expect value will load from segment 4 register (index ADh). When VT1 temperature is below this boundary - hysteresis, FAN1 expect value will load from segment 5 register (index ADh).
8.2.41 FAN1 SEGMENT 1 SPEED COUNT - Index AAh Bit Name R/W Default Description
FFh The meaning of this register is depending on the FAN1_MODE(CR96) (100%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. Ex: 7-0 SEC1SPEED1 R/W
32 Expect speed = x Fullspeeed 32+ value
100%:full speed: User must set this register to 0. 60% full speed: (100-60)*32/60, so user must program 21 to this reg. X% full speed: The value programming in this byte is (100-X)*32/X
2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
8.2.42 FAN1 SEGMENT 2 SPEED COUNT Bit Name R/W Default
- Index ABh Description
7-0 SEC2SPEED1
R/W
D9h Depend on the FAN1_MODE(CR96[1:0]) register setting: (85%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
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8.2.43 FAN1 SEGMENT 3 SPEED COUNT Bit Name R/W Default - Index ACh Description B2h Depend on the FAN1_MODE(CR96[1:0]) register setting: (70%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
7-0 SEC3SPEED1
R/W
8.2.44 FAN1 SEGMENT 4 SPEED COUNT Bit Name R/W Default
- Index ADh Description
7-0 SEC4SPEED1
R/W
99h Depend on the FAN1_MODE(CR96[1:0]) register setting: (60%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
8.2.45 FAN1 SEGMENT 5 SPEED COUNT Bit Name R/W Default
- Index AEh Description
7-0 SEC5SPEED1
R/W
80h Depend on the FAN1_MODE(CR96[1:0]) register setting: (50%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
8.2.46 FAN1 Temperature Mapping Select Bit 7 6 5 4 Name FAN1_PRE_UP_EN FAN1_NO_STOP FAN1_UP_T_EN R/W Default R/W R/W R/W 0 0 0 0 1 3 FAN1_JUMP_HIGH_EN R/W 1 2 FAN1_JUMP_LOW_EN R/W
- Index AFh Description
If this bit set to 1, when detect loading increase acutely, fan1 will pre-up fan speed If this bit set to 1, fan1 min duty will in duty that define in CR9C Set 1 to force FAN1 to the highest speed if any temperature over its high limit. Set 1 will enable the interpolation of the fan expect table. (Auto Linear Mode) Set 1 that FAN1 speed will jump to FAN1 SEGMENT 1 SPEED when temperature over T1 Boundary 1. Set 0 that FAN1 speed will raise up to FAN1 SEGMENT 1 SPEED by slop value( CR9B) when temperature over T1 Boundary 1. Set 1 that FAN1 speed will jump to FAN1 SEGMENT 2 SPEED when temperature under FAN1 Boundary Hystersis. Set 0 that FAN1 speed will decrease to FAN1 SEGMENT 2 SPEED by slop value( CR9B) when temperature under FAN1 Boundary Hystersis. 0: fan1 follow local temperature. 1: fan1 follow temperature 1. 2: fan1 follow temperature 2. 3: fan1 follow temperature 3.
FAN1_INTERPOLATION_EN R/W
1-0 Fan1_temp_sel
R/W
1
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Fan2 Index B0h- BFh
Address Attribute Default Value 8'h0f 8'hff Description FAN2 count reading (MSB). At the moment of reading this register, the LSB will be latched. This will prevent from data updating when reading. To read the fan count correctly, read MSB first and followed read the LSB. FAN2 count reading (LSB). RPM mode(CR96 bit2=0): FAN2 expect speed count value (MSB), in auto fan mode(CR96 bit3 0) this register is auto updated by hardware. Duty mode(CR96 bit2=1): This byte is reserved byte. RPM mode(CR96 bit2=0): FAN2 expect speed count value (LSB) or expect PWM duty , in auto fan mode this register is auto updated by hardware and read only. Duty mode(CR96 bit2=1): The Value programming in this byte is duty value. In auto fan mode(CR96 bit3 0) this register is updated by hardware. Ex: 5 5*100/255 % 255 100% FAN2 full speed count reading (MSB). At the moment of reading this register, the LSB will be latched. This will prevent from data updating when reading. To read the fan count correctly, read MSB first and followed read the LSB. FAN2 full speed count reading (LSB).
B0h B1h
RO RO
B2h
R/W
8'h00
B3h
R/W
8'h01
B4h B5h
R/W R/W
8'h03 8'hff
8.2.47 VT2 BOUNDARY 1 TEMPERATURE - Index B6h Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
6-0 BOUND1TMP2
R/W
st 3Ch The 1 BOUNDARY temperature for VT2 in temperature mode. (60oC) When VT2 temperature is exceed this boundary, FAN2 expect value will load from segment 1 register (index BA)h. When VT2 temperature is below this boundary - hysteresis, FAN2 expect value will load from segment 2 register (index BAh).
8.2.48 VT2 BOUNDARY 2 TEMPERATURE - Index B7 Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
6-0 BOUND2TMP2
R/W
The 2st BOUNDARY temperature for VT2 in temperature mode. 32 (50oC) When VT2 temperature is exceed this boundary, FAN2 expect value will load from segment 2 register (index BB)h. When VT2 temperature is below this boundary - hysteresis, FAN2 expect value will load from segment 3 register (index BBh).
8.2.49 VT2 BOUNDARY 3 TEMPERATURE - Index B8h Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
6-0 BOUND3TMP2
R/W
st 28h The 3 BOUNDARY temperature for VT2 in temperature mode. o (40 C) When VT2 temperature is exceed this boundary, FAN2 expect value will load from segment 3 register (index BC)h. When VT2 temperature is below this boundary - hysteresis, FAN2 expect value will load from segment 4 register (index BCh).
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8.2.50 VT2 BOUNDARY 4 TEMPERATURE - Index B9 Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
6-0 BOUND4TMP2
R/W
st 1Eh The 4 BOUNDARY temperature for VT2 in temperature mode. (30oC) When VT2 temperature is exceed this boundary, FAN2 expect value will load from segment 4 register (index BDh). When VT2 temperature is below this boundary - hysteresis, FAN2 expect value will load from segment 5 register (index BDh).
8.2.51 FAN2 SEGMENT 1 SPEED COUNT Bit Name R/W Default
- Index BAh Description
FFh The meaning of this register is depending on the FAN2_MODE(CR96) (100%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. Ex: 7-0 SEC1SPEED2 R/W
32 Expect speed = x Fullspeeed 32+ value
60% full speed: (100-60)*32/60, so user must program 21 to this reg. X% full speed: The value programming in this byte is
100%:full speed: User must set this register to 0.
(100-X)*32/X 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
8.2.52 FAN2 SEGMENT 2 SPEED COUNT - Index BBh Bit Name R/W Default Description D9h Depend on the FAN2_MODE(CR96[3:2]) register setting: (85%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
7-0 SEC2SPEED2
R/W
8.2.53 FAN2 SEGMENT 3 SPEED COUNT Bit Name R/W Default
- Index BCh Description
7-0 SEC3SPEED2
R/W
B2h Depend on the FAN2_MODE(CR96[3:2]) register setting: (70%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
8.2.54 FAN2 SEGMENT 4 SPEED COUNT Bit Name R/W Default
- Index BDh Description
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7-0 SEC4SPEED2 R/W 99h Depend on the FAN2_MODE(CR96[3:2]) register setting: (60%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
8.2.55 FAN2 SEGMENT 5 SPEED COUNT Bit Name R/W Default
- Index BEh Description
7-0 SEC5SPEED2
R/W
80h Depend on the FAN2_MODE(CR96[3:2]) register setting: (50%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
8.2.56 FAN2 Temperature Mapping Select Bit 7 6 5 4 Name FAN2_PRE_UP_EN FAN2_NO_STOP FAN2_UP_T_EN R/W Default R/W R/W R/W 0 0 0 0 1 3 FAN2_JUMP_HIGH_EN R/W 1 2 FAN2_JUMP_LOW_EN R/W
- Index BFh Description
If this bit set to 1, when detect loading increase acutely, fan2 will pre-up the fan speed. If this bit set to 1, fan2 min duty will in duty that define in CR9C Set 1 to force FAN2 to the highest speed if any temperature over its high limit. Set 1 will enable the interpolation of the fan expect table. (Auto Linear Mode) Set 1 that FAN2 speed will jump to FAN2 SEGMENT 1 SPEED when temperature over T2 Boundary 1. Set 0 that FAN2 speed will raise up to FAN2 SEGMENT 1 SPEED by slop value( CR9B) when temperature over T2 Boundary 1. Set 1 that FAN2 speed will jump to FAN2 SEGMENT 2 SPEED when temperature under FAN2 Boundary Hystersis. Set 0 that FAN2 speed will decrease to FAN2 SEGMENT 2 SPEED by slop value( CR9B) when temperature under FAN2 Boundary Hystersis. 0: fan2 follow local temperature. 1: fan2 follow temperature 1. 2: fan2 follow temperature 2. 3: fan2 follow temperature 3.
FAN2_INTERPOLATION_EN R/W
1-0 Fan2_temp_sel
R/W
2
Fan3 Index C0h- CFh
Address Attribute Default Value 8'h0F 8'hff Description FAN3 count reading (MSB). At the moment of reading this register, the LSB will be latched. This will prevent from data updating when reading. To read the fan count correctly, read MSB first and followed read the LSB. FAN3 count reading (LSB). RPM mode(CR96 bit4=0): FAN3 expect speed count value (MSB), in auto fan mode(CR96 bit5 register is auto updated by hardware. Duty mode(CR96 bit4=1): This byte is reserved byte. RPM mode(CR96 bit4=0):
C0h C1h
RO RO
0) this
C2h
R/W
8'h00
C3h
R/W
8'h01
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FAN3 expect speed count value (LSB) or expect PWM duty , in auto fan mode this register is auto updated by hardware and read only. Duty mode(CR96 bit4=1): The Value programming in this byte is duty value. In auto fan mode(CR96 bit5 0) this register is updated by hardware. Ex: 5 5*100/255 % 255 100% FAN3 full speed count reading (MSB). At the moment of reading this register, the LSB will be latched. This will prevent from data updating when reading. To read the fan count correctly, read MSB first and followed read the LSB. FAN3 full speed count reading (LSB).
C4h C5h
R/W R/W
8'h03 8'hff
8.2.57 VT3 BOUNDARY 1 TEMPERATURE - Index C6h Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
6-0 BOUND1TMP3
R/W
st 3Ch The 1 BOUNDARY temperature for VT3 in temperature mode. (60oC) When VT3 temperature is exceed this boundary, FAN3 expect value will load from segment 1 register (index CA)h. When VT3 temperature is below this boundary - hysteresis, FAN3 expect value will load from segment 2 register (index CAh).
8.2.58 VT3 BOUNDARY 2 TEMPERATURE - Index C7 Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
6-0 BOUND2TMP3
R/W
The 2st BOUNDARY temperature for VT3 in temperature mode. 32 o (50 C) When VT3 temperature is exceed this boundary, FAN3 expect value will load from segment 2 register (index CB)h. When VT3 temperature is below this boundary - hysteresis, FAN3 expect value will load from segment 3 register (index CBh).
8.2.59 VT3 BOUNDARY 3 TEMPERATURE - Index C8h Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
6-0 BOUND3TMP3
R/W
st 28h The 3 BOUNDARY temperature for VT3 in temperature mode. (40oC) When VT3 temperature is exceed this boundary, FAN3 expect value will load from segment 3 register (index CC)h. When VT3 temperature is below this boundary - hysteresis, FAN3 expect value will load from segment 4 register (index CCh).
8.2.60 VT3 BOUNDARY 4 TEMPERATURE - Index C9 Bit 7 Name Reserved R/W Default RO 0 Return 0 when read. Description
6-0 BOUND4TMP3
R/W
st 1Eh The 4 BOUNDARY temperature for VT3 in temperature mode. (30oC) When VT3 temperature is exceed this boundary, FAN3 expect value will load from segment 4 register (index CDh). When VT3 temperature is below this boundary - hysteresis, FAN3 expect value will load from segment 5 register (index CDh).
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8.2.61 FAN3 SEGMENT 1 SPEED COUNT Bit Name R/W Default - Index CAh Description FFh The meaning of this register is depending on the FAN3_MODE(CR96) (100%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. Ex: 7-0 SEC1SPEED3 R/W
32 Expect speed = x Fullspeeed 32+ value
100%:full speed: User must set this register to 0. 60% full speed: (100-60)*32/60, so user must program 21 to this reg. X% full speed: The value programming in this byte is (100-X)*32/X 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
8.2.62 FAN3 SEGMENT 2 SPEED COUNT - Index CBh Bit Name R/W Default Description D9h Depend on the FAN3_MODE(CR96[5:4]) register setting: (85%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
7-0 SEC2SPEED3
R/W
8.2.63 FAN3 SEGMENT 3 SPEED COUNT Bit Name R/W Default
- Index CCh Description
7-0 SEC3SPEED3
R/W
B2h Depend on the FAN3_MODE(CR96[5:4]) register setting: (70%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
8.2.64 FAN3 SEGMENT 4 SPEED COUNT Bit Name R/W Default
- Index CDh Description
7-0 SEC4SPEED3
R/W
99h Depend on the FAN3_MODE(CR96[5:4]) register setting: (60%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
8.2.65 FAN3 SEGMENT 5 SPEED COUNT Bit Name R/W Default
- Index CEh Description
7-0 SEC5SPEED3
R/W
80h Depend on the FAN3_MODE(CR96[5:4]) register setting: (50%) 2'b00: The value that set in this byte is the relative expect fan speed % of the full speed in this temperature section. 2'b01: The value that set in this byte is mean the expect PWM duty-cycle in this temperature section.
8.2.66 FAN3 Temperature Mapping Select Bit 7 Name FAN3_PRE_UP_EN R/W Default R/W 0
- Index CFh Description
If this bit set to 1, when detect loading increase acutely, fan3 will pre-up fan speed
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6 5 4 FAN3_NO_STOP FAN3_UP_T_EN R/W R/W 0 0 0 1 3 FAN3_JUMP_HIGH_EN R/W 1 2 FAN3_JUMP_LOW_EN R/W If this bit set to 1, fan3 min duty will in duty that define in CR9D Set 1 to force FAN3 to the highest speed if any temperature over its high limit. Set 1 will enable the interpolation of the fan expect table. (Auto Linear Mode) Set 1 that FAN3 speed will jump to FAN3 SEGMENT 1 SPEED when temperature over T3 Boundary 1. Set 0 that FAN3 speed will raise up to FAN3 SEGMENT 1 SPEED by slop value( CR9B) when temperature over T3 Boundary 1. Set 1 that FAN3 speed will jump to FAN3 SEGMENT 2 SPEED when temperature under FAN3 Boundary Hystersis. Set 0 that FAN3 speed will decrease to FAN3 SEGMENT 2 SPEED by slop value( CR9B) when temperature under FAN3 Boundary Hystersis. 0: fan3 follow local temperature. 1: fan3 follow temperature 1. 2: fan3 follow temperature 2. 3: fan3 follow temperature 3.
FAN3_INTERPOLATION_EN R/W
1-0 Fan3_temp_sel
R/W
3
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8.3 Loading Gauge Registers
8.3.1 Loading Gauge Configuration Register Index 01h Bit 7 6 5-4 3 Name GAUGE_DIS MUL_EN PWM_MUL LPF_DIS R/W Default R/W R/W R/W R/W 0 0 0 0 Description If this bit is set to 1, loading gauge is disabled. If this bit is set to 1, gauging multi-phase pwm is enabled. Select PWMIN type : 0: Single phase 1: Two phase 2: Three phase 3: Four phase If this bit is set to 1, low pass filter of loading gauge reading is disabled. Set these to select gauging period. 0: 0x3FF_FFFF Loading gauge cycles 1: 0x1FF_FFFF Loading gauge cycles 2: 0x0FF_FFFF Loading gauge cycles 3: 0x07F_FFFF Loading gauge cycles 4: 0x03F_FFFF Loading gauge cycles 5: 0x01F_FFFF Loading gauge cycles 6: 0x00F_FFFF Loading gauge cycles 7: 0x007_FFFF Loading gauge cycles
2-0
TIME_SEL
R/W
4
8.3.2 Loading Gauge Configuration Register Index 02h Bit 7 6-4 3 2-1 Name R/W Default 1 7 0 1 Description If this bit is set to 1, offset_sel will be offset_sel_manual. If offset_sel_manual_en is set to 1, offset_sel will be forced to this value If this bit is set to 1, stop# is disabled Loading gauge clock will be -0: 6.25 Mhz 1: 12.5 Mhz 2, 3: 25Mhz 0: Gauge high level of PWMIN 1: Gauge low level of PWMIN OFFSET_SEL_MANU R/W AL_EN OFFSET_SEL_MANU R/W AL STOP_DIS LG_CLK_SEL R/W R/W
0
PWM_INV
R/W
0
8.3.3 Loading Gauge Reading Register (MSB) Index 03h Bit 7-0 Name LG_READING[15:8] R/W Default R 0 MSB of loading gauge reading Description
8.3.4 Loading Gauge Reading Register (LSB) Index 04h Bit 7-0 Name LG_READING[7:0] R/W Default R 0 LSB of loading gauge reading Description
8.3.5 Loading Gauge Limit 1 Register (MSB) Index 05h Bit 7-0 Name LIMIT1[11:4] R/W Default R/W 0 MSB of loading gauge limit1 Description
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8.3.6 Loading Gauge Limit 1 Register (LSB) Index 06h Bit 7-4 3-0 Name LIMIT1[3:0] reserved R/W Default R/W R 0 0 Description LSB of loading gauge limit1. Limit1[0] is used to set overclocking(set to 1) or underclocking (set to 0) reserved
8.3.7 Loading Gauge Hysteresis 1 Register (MSB) Index 07h Bit 7-0 Name HYST1[11:4] R/W Default R/W 0 Description MSB of loading gauge hysteresis1
8.3.8 Loading Gauge Hysteresis 1 Register (LSB) Index 08h Bit 7-4 3-0 Name HYST1[3:0] reserved R/W Default R/W R 0 0 reserved Description LSB of loading gauge hysteresis1
8.3.9 Loading Gauge Limit 2 Register (MSB) Index 09h Bit 7-0 8.3.10 Bit 7-4 3-0 Name LIMIT2[11:4] R/W Default R/W 0 MSB of loading gauge limit2 Description
Loading Gauge Limit 2 Register (LSB) Index 0Ah Name LIMIT2[3:0] reserved R/W Default R/W R 0 0 Description LSB of loading gauge limit2 Limit2[0] is used to set overclocking(set to 1) or underclocking (set to 0) reserved
8.3.11 Bit 7-0
Loading Gauge Hysteresis 2 Register (MSB) Index 0Bh Name HYST2[11:4] R/W Default R/W 0 Description MSB of loading gauge hysteresis2
8.3.12 Bit 7-4 3-0
Loading Gauge Hysteresis 2 Register (LSB) Index 0Ch Name HYST2[3:0] reserved R/W Default R/W R 0 0 reserved Description LSB of loading gauge hysteresis2
8.3.13 Bit 7-0
Loading Gauge Limit 3 Register (MSB) Index 0Dh Name LIMIT3[11:4] R/W Default R/W 0 MSB of loading gauge limit3 Description
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8.3.14 Bit 7-4 3-0 Loading Gauge Limit 3 Register (LSB) Index 0Eh Name LIMIT3[3:0] reserved R/W Default R/W R 0 0 Description LSB of loading gauge limit3 Limit3[0] is used to set overclocking (set to 1) or underclocking (set to 0) reserved
8.3.15 Bit 7-0
Loading Gauge Hysteresis 3 Register (MSB) Index 0Fh Name HYST3[11:4] R/W Default R/W 0 Description MSB of loading gauge hysteresis3
8.3.16 Bit 7-4 3-0
Loading Gauge Hysteresis 3 Register (LSB) Index 10h Name HYST3[3:0] reserved R/W Default R/W R 0 0 reserved Description LSB of loading gauge hysteresis3
8.3.17 Bit 7-0
Loading Gauge Limit 4 Register (MSB) Index 11h Name LIMIT4[11:4] R/W Default R/W 0 MSB of loading gauge limit4 Description
8.3.18 Bit 7-4 3-0
Loading Gauge Limit 4 Register (LSB) Index 12h Name LIMIT4[3:0] reserved R/W Default R/W R 0 0 Description LSB of loading gauge limit4 Limit4[0] is used to set overclocking(set to 1) or underclocking (set to 0) reserved
8.3.19 Bit 7-0
Loading Gauge Hysteresis 4 Register (MSB) Index 13h Name HYST4[11:4] R/W Default R/W 0 Description MSB of loading gauge hysteresis4
8.3.20 Bit 7-4 3-0
Loading Gauge Hysteresis 4 Register (LSB) Index 14h Name HYST4[3:0] reserved R/W Default R/W R 0 0 reserved Description LSB of loading gauge hysteresis4
8.3.21 Bit 7 6-4 3
Loading Gauge Section Mapping Register 1 Index 15h Name reserved SEC1 reserved R/W Default R R/W R 0 1 0 Reserved Section1 mapping value Reserved Description
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2-0 SEC0 R/W 0 Section0 mapping value 8.3.22 Bit 7 6-4 3 2-0 Loading Gauge Section Mapping Register 2 Index 16h Name reserved SEC3 reserved SEC2 R/W Default R R/W R R/W 0 3 0 2 Reserved Section3 mapping value Reserved Section2 mapping value Description
8.3.23 Bit 7-3 2-0
Loading Gauge Section Mapping Register 3 Index 17h Name reserved SEC4 R/W Default R R/W 0 4 Reserved Section4 mapping value Description
8.3.24 Bit 7 6-4 3 2-0 8.3.25 Bit 7-1 0
Loading Gauge Real Time Status Register Index 18h Name reserved CURRENT_SEC reserved TURBO_N R/W Default R R R R 0 0 Reserved Indicate current section. (Original section value, not mapped) Reserved Indicate current TURBO_N status.( mapped) Description
Loading Gauge PME status register Index 20h Name reserved LG_PME_STS R/W Default R R 0 Reserved If the section value changes and the relative limitx_pme_en is enabled, this bit will be set to 1. Write 1 to clear this bit. Description
8.3.26 Bit 7-4 3 2 1 0
Loading Gauge PME Control register Index 21h Name reserved Limit4_pme_en Limit3_pme_en Limit2_pme_en Limit1_pme_en R/W Default R/W R/W R/W R/W R/W 0 0 0 0 0 Reserved (Dummy registers) If loading gauge reading moves across limit4 set to 1, the LG_PME_STS will be set to 1. If loading gauge reading moves across limit3 set to 1, the LG_PME_STS will be set to 1. If loading gauge reading moves across limit2 set to 1, the LG_PME_STS will be set to 1. If loading gauge reading moves across limit1 set to 1, the LG_PME_STS will be set to 1. (up or down) and this bit is (up or down) and this bit is (up or down) and this bit is (up or down) and this bit is Description
8.3.27 Bit 7-4 3-0
Loading Gauge Stop Time Control register Index 22h Name Reserved STOP_CNT R/W Default R R/W 0 0 Reserved Set STOP_CNT can modify the pulse period of pin STOP#. Stop time = 30 + (5*STOP_CNT) ms Description
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8.3.28 Bit 7-3 4-0 Loading Gauge Hysteresis Timeout Control register Index 23h Name Reserved TIMEOUT_CNT R/W Default R R/W 0 5 Reserved If loading gauge reading is located at one of the hysteresis range and stay at this range for TIMEOUT_CNT monitoring times, the current section will return to the previous one. Description
8.3.29 Bit 7-3
Loading Increasing Control register 1 Index 25h Name Reserved R/W Default R 0 Reserved These bits are for pre-control machine use that is for fan control by loading status. When loading status increases promptly over the setting as below, fan control system will pre-control fan speed up to cool down the predict raising temperature. This value is base on LG_READING [17:6] register. 000: 0x01 001: 0x02 010: 0x04 011: 0x08 100: 0x0F 101: 0x1F 110: 0x3F 111: 0x7F Description
2-0
LOAD_RANGE_SEL R/W
0
8.3.30 Bit 7 6-4
Loading Increasing Control register 2 Index 26h Name Reserved R/W Default R 0 7 Reserved Default 6.4 seconds (800ms per step). These bits will be used with Loading Increase Control register. When fan speed increasing to expect status (follow the LOAD_UP_TIME), user can fill out these two bits register to decide period of hold time. Default 4 seconds (400ms per step). When loading status run over LOAD_RANGE_SEL setting, user can set the raising time of fan speed. Description
LOAD_HOLD_TIME R/W
3-0
LOAD_UP_TIME
R/W
9
8.3.31 Bit 7 6-1 0
Loading Gauge Sorting & One Shot Control register Index 30h Name SORTING_EN Reserved ONE_SHOT_EN R/W Default R/W R R/W 0 0 0 Description Set this bit to 1 for sorting hysteresis. It will be auto cleared after finish sorting. Reserved Set this bit to enable one-shot. If one-shot is finished, gauge_counter_dis bit will be set to 1. If another one-shot is needed, just write gauge_counter_dis bit to 0
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8.4 VID Controller Registers
8.4.1 VID Configuration Register Index 01h Bit 7 6 5 4 Name Reserved WDOUT_EN KEY_OK OTF_EN R/W Default R/W R/W R R/W 0 0 0 0 0 Reserved If this bit is set to 1 and watchdog timeout event occurs, RSTOUT# output is enabled. If private keys are entered correctly, this bit will be set to 1. If this bit is set to 1 and "MANUAL_MODE" is 0, VID on the fly is enabled and VID_OUT will be new VID_OUT. If this bit is set to 0, VID_OUT will be VID_IN. This bit is also cleared by slotocc and reset signal of watchdog timeout. (Protected by serial key) If this bit is set to 1 and "OTF_EN" is 1, VID_OUT will be "VID_MANUAL" in register index 0x04. (Protected by serial key) This bit is protected by serial key. 0: Intel VRM10.0 1: Intel extended VRM10.0 2: Intel VRM11.0 3: AMD VRM 4~7: Reserved Description
3
MANUAL_MODE
R/W
2-0
VRM_SEL
R/W
0
8.4.2 VID Configuration Register Index 02h Bit 7-0 Name KEY_VALUE R/W Default R/W 0 Description Private key value (0x32 0x5d 0x42 0xac)
8.4.3 VID_IN Reading Register Index 03h Bit 7-0 Name VID_IN R/W Default R Description VID_IN reading from CPU. If GP2_SEL[1] is 0, the VID_IN is current VID of CPU. If GP2_SEL[1] is set from 0 to 1, the VID of CPU is latched at this time.
8.4.4 VID Manual Register Index 04h Bit 7-0 Name VID_MANUAL R/W Default R/W 0 Description If "MANUAL_MODE" is set to 1 and "OTF_EN" is set to 0, VID_OUT will be VID_MANUAL. (Protected by serial key)
8.4.5 VID Offset Register 1 Index 05h Bit 7-0 Name VID_OFFSET0 R/W Default R/W 0 Description If "CURRENT_SEC" in loading gauge register (Index 18h) is 0, VID_OFFSET0 is selected as the offset of VID. VID_OFFSET0[7] is a sign bit. (Protected by serial key)
8.4.6 VID Offset Register 2 Index 06h Bit 7-0 Name VID_OFFSET1 R/W Default R/W 0 Description If "CURRENT_SEC" in loading gauge register (Index 18h) is 1, VID_OFFSET1 is selected as the offset of VID. VID_OFFSET1[7] is a sign bit. (Protected by serial key)
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8.4.7 VID Offset Register 3 Index 07h Bit 7-0 Name VID_OFFSET2 R/W Default R/W 0 Description If "CURRENT_SEC" in loading gauge register (Index 18h) is 2, VID_OFFSET2 is selected as the offset of VID. VID_OFFSET2[7] is a sign bit. (Protected by serial key)
8.4.8 VID Offset Register 4 Index 08h Bit 7-0 Name VID_OFFSET3 R/W Default R/W 0 Description If "CURRENT_SEC" in loading gauge register (Index 18h) is 3 VID_OFFSET3 is selected as the offset of VID. VID_OFFSET3[7] is a sign bit. (Protected by serial key)
8.4.9 VID Offset Register 5 Index 09h Bit 7-0 Name VID_OFFSET4 R/W Default R/W 0 Description If "CURRENT_SEC" in loading gauge register (Index 18h) is 4 VID_OFFSET4 is selected as the offset of VID. VID_OFFSET4[7] is a sign bit. (Protected by serial key)
8.4.10 Bit 7 6 5 4 3 2 1-0
VID Watchdog Timer Configuration Register Index 0Ah Name Reserved WDTMOUT_STS WD_EN WD_PULSE WD_UNIT WD_HACTIVE WD_PSWIDTH R/W Default R R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 Reserved If watchdog timeout event occurs, this bit will be set to 1. Write a 1 to this bit will clear it to 0. If this bit is set to 1, the counting of watchdog time is enabled. Select output mode (0: level, 1: pulse) of RSTOUT# by setting this bit. Select time (0: 1sec, 1: 60 sec) of watchdog timer by setting this bit. Select output polarity of RSTOUT# (0: high active, 1: low active) by setting this bit. Select output pulse width of RSTOUT# 0: 1 ms 1: 25 ms 2: 125 ms 3: 5 sec Description
8.4.11 Bit 7-0
VID Watchdog Time Register Index 0Bh Name WD_TIME R/W Default R/W 0 Time of watchdog timer Description
8.4.12 Bit 7 6 5-4
VID Switch Control Register Index 0Ch Name R/W Default 0 1 0 Description If this bit is set to 1, the switch value equals to the selected vid offset[3:0] (Protected by serial key) Set to 1 the pin GPIO10/LED and GPIO11/BEEP will short. (Protected by serial key) Reserved (Dummy registers) (Protected by serial key)
SWITCH_AUTO_EN R/W OVER_VOLTAGE_E R/W N reserved R/W
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7 3-0 SWITCH_SEL R/W If switch_auto_en is 0, switch value equals to SWITCH_SEL. There are total 16 switches (0~15). Switch value is 5 means that the sixth switch is on. This bit is also cleared by slotocc and reset signal of watchdog timeout. (Protected by serial key)
8.4.13 Bit 7 6 5:4 3
VID_IN/VID_OUT Function Select Register Index 0Dh Name R/W Default 0 0 0 0 GP3_SEL1 R/W 0 Description If this bit is set to 1, GP3_SEL1 and GP3_SEL0 will not be cleared by slotocc and reset signal of watchdog timeout. (Protected by serial key) If this bit is set to 1, GP2_SEL1 and GP2_SEL0 will not be cleared by slotocc and reset signal of watchdog timeout. (Protected by serial key) reserved This bit is function select of VID_IN[4:0] / GPIO3[4:0]. If GP3_SEL1 is 0, the selected function is VID_IN. This bit is also cleared by slotocc and reset signal of watchdog timeout if GP3_SEL_CLR_DIS is 0. (Protected by serial key). This bit is function select of VID_IN[5] / GPIO3[5]. If GP3_SEL0 is 0, the selected function is VID_IN. This bit is also cleared by slotocc and reset signal of watchdog timeout if GP3_SEL_CLR_DIS is 0. (Protected by serial key) This bit is function select of VID_OUT[4:0] / GPIO2[1:5]. If GP2_SEL1 is 0, the selected function is VID_OUT. This bit is also cleared by slotocc and reset signal of watchdog timeout if GP2_SEL_CLR_DIS is 0. (Protected by serial key) This bit is function select of VID_OUT[5] / GPIO2[0]. If GP2_SEL0 is 0, the selected function is VID_OUT. This bit is also cleared by slotocc and reset signal of watchdog timeout if GP2_SEL_CLR_DIS is 0. (Protected by serial key)
GP3_SEL_CLR_DIS R/W GP2_SEL_CLR_DIS R/W Reserved R
2
GP3_SEL0
R/W 0
1
GP2_SEL1
R/W 0
0
GP2_SEL0
R/W
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9. Electrical Characteristics
9.1 Absolute Maximum Ratings
PARAMETER Power Supply Voltage Input Voltage Operating Temperature Storage Temperature RATING -0.5 to 5.5 -0.5 to VCC+0.5 0 to +140 -55 to 150 UNIT V V C C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device
9.2 DC Characteristics
(TA = 0 C to 70 C, VCC = 3.3V 10%, VSS = 0V ) Parameter Temperature Error, Remote Diode Temperature Error, Local Diode Supply Voltage range Average VCC operating supply current Average VCC standby supply current Average VSB supply current Power down current Resolution Power on reset threshold Diode source current Conditions 60 C < TD < 100 oC, VCC = 3.0V to 3.6V -25 oC

o
MIN
3.0 FAN and loading gauge in ILDE mode, I2C interface polling. FAN and loading gauge in ILDE mode, I2C interface stop.
TYP 1 1 1 3.3 2.2 2.0 250 60 1 2.2 95 10
MAX 3 3 3.6
Unit o C C V mA mA uA uA o C V uA uA
o
2.4
High Level Low Level
DC Characteristics, continued
(Ta = 0 C to 70 C, VCC = 3.3V 10%, VSS = 0V) PARAMETER SYM. MIN. TYP. MAX. UNIT CONDITIONS I/OD12st-TTL level bi-directional pin with schmitt trigger, Open-drain output with12 mA sink capability. Input Low Voltage VIL 0.8 V Input High Voltage VIH 2.0 V Output Low Current IOL +12 mA VOL = 0.4V Input High Leakage ILIH +1 A VIN = VCC Input Low Leakage ILIL -1 A VIN = 0V 53 July, 2007 V0.25P
F75334
I/OOD12st-TTL level bi-directional pin with schmitt trigger, Output pin with 12mA source-sink capability, and can programming to open-drain function. Input Low Threshold Voltage Vt0.8 V VCC = 3.3 V Input High Threshold Voltage Vt+ 2.0 V VCC = 3.3 V Output Low Current IOL -12 -9 mA VOL = 0.4 V Output High Current IOH +9 +12 mA VOH = 2.4V Input High Leakage ILIH +1 A VIN = VCC Input Low Leakage ILIL -1 A VIN = 0V I/OOD12lv-Low voltage bi-directional pin with schmitt trigger, Output pin with 12mA source-sink capability, and can programming to open-drain function. Input Low Threshold Voltage Vt0.6 V VCC = 3.3 V Input High Threshold Voltage Vt+ 0.9 V VCC = 3.3 V Output Low Current IOL -12 -9 mA VOL = 0.4 V Output High Current IOH +9 +12 mA VOH = 2.4V Input High Leakage ILIH +1 A VIN = 1.2V Input Low Leakage ILIL -1 A VIN = 0V INst - TTL level input pin with schmitt trigger Input Low Voltage VIL 0.8 V Input High Voltage VIH 2.0 V Input High Leakage ILIH +1 A VIN = VCC Input Low Leakage ILIL -1 A VIN = 0 V INlv - Low level input pin Input Low Voltage VIL 0.6 V Input High Voltage VIH 0.9 V Input High Leakage ILIH +1 A VIN = 1.2V Input Low Leakage ILIL -1 A VIN = 0 V OD12-Open-drain output with12 mA sink capability. Output Low Current IOL -12 mA VOL = 0.4V OOD12- Output pin with 12mA source-sink capability, and can programming to open-drain function. Output Low Current IOL -12 -9 mA VOL = 0.4 V Output High Current IOH +9 +12 mA VOH = 2.4V
10.Ordering Information
Part Number F75334DG Package Type 48-LQFP Green Package Production Flow Commercial, 0C to +70C
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July, 2007 V0.25P
F75334
11.Package Dimensions
48pin-LQFP (7mm*7mm)
HD D
36 25
Dimension in inch
Dimension in mm Min.
--0.05 1.35 0.17 0.09
Symbol
Min.
Nom.
Max.
Nom.
----1.40 0.20 --7.00 7.00 0.50 9.00 9.00
Max.
1.60 0.15 1.45 0.27 0.20
37
24
E
HE
48
13
1
e
b
12
A A1 A2 b c D E e HD HE L L1 y 0
Notes:
c
0.45
0.60 1.00
0.75
--0
0.08 3.5
--7
A2
A
Seating Plane
See Detail F
A1 y
L L1 Detail F
1. Dimensions D & E do not include interlead flash. 2. Dimension b does not include dambar protrusion/intrusion. 3. Controlling dimension: Millimeters 4. General appearance spec. should be based on final visual inspection spec.
Feature Integration Technology Inc.
Headquarters 3F-7, No 36, Tai Yuan St., Chupei City, Hsinchu, Taiwan 302, R.O.C. TEL : 886-3-5600168 FAX : 886-3-5600166 www: http://www.fintek.com.tw Taipei Office Bldg. K4, 7F, No.700, Chung Cheng Rd., Chungho City, Taipei, Taiwan 235, R.O.C. TEL : 866-2-8227-8027 FAX : 866-2-8227-8037
Please note that all datasheet and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this datasheet belong to their respective owner
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July, 2007 V0.25P
12.Application Circuit
FAN_IN1 CPU_STOP# CLK_Turbo1# CLK_Turbo0# VIDIN2 VIDIN1 VIDIN0 FAN_CTL2 FAN_IN2 FAN_CTL1
F75334
Example 2:
TEMPERATURE MONITOR (Thermistor)
T1 VREF VCC_PWM VREF R17 R19 R21 R23 R18 R20 R22 R24 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K VREF 24 23 22 21 20 19 18 17 16 15 14 13 VIDOUT0 VIDOUT1 VIDOUT2 VIDOUT3 VIDOUT4 VIDOUT5 VIDOUT6 VIDOUT7 0.1u C9 3VSB R28 10K 1% R25 T3 10K 1% RT1
Example 1:
TEMPERATURE MONITOR
T1 C7 3300pF
SDA SCL
TURBO0#
R26 VIN1 R27
100K VDD1 100K 37 38 39 40 41 42 43 44 45 46 47 48 (2.0V)
VIDIN2/GPIO32 VIDIN1/GPIO31 VIDIN0/GPIO30 FAN_CTL2 FAN_IN2 FAN_CTL1 FAN_IN1 LG_STOP#/GPIO41 LG_TURBO1#/GPIO40/PECI/AMDSI_DAT LG_TURBO# SDA SCL
10K THERMISTOR RT3
t
U3
36 35 34 33 32 31 30 29 28 27 26 25
VOLTAGE MONITOR
T2
10K THERMISTOR RT2
t
R16
10K 1%
THERMDA
THERMDC
T2 C8 3300pF
THERMDA
R29 VIN2 R30
150K VDD2 100K (2.5V)
VIDIN3 VIDIN4 VIDIN5 VIDIN6 VIDIN7 FAN_IN3 3VCC FAN_CTL3 0.1u C11 VIN1 VIN2 VIN3 VIN4
R31 VIN3 R32
47K VDD3 100K (1.5V)
VIDIN3/GPIO33 VIDIN4/GPIO34 VIDIN5/GPIO35 VIDIN6 VIDIN7 FAN_IN3/GPIO42 FAN_CTRL3/GPIO43 VCC VIN1 VIN2 VIN3 VIN4
VIDOUT0/GPIO25 VIDOUT1/GPIO24 VIDOUT2/GPIO23 VIDOUT3/GPIO22 VIDOUT4/GPIO21 VIDOUT5/GPIO20 VIDOUT6 VIDOUT7 PWMIN VSB GPIO14/LG_TRUBO2# GPIO13/FAN_FAULT#/SST/AMDSI_CLK
10K THERMISTOR
t
THERMDC
T3 3300pF C10 Q4 PNP 3906
PWM_Control_phase CLK_Turbo2# FAN_FAULT#
R33 VIN3 R34
47K VDD4 100K (1.5V)
VREF DD1+ D2+ D3+ GND OVT#/FAN_FAULT# SLOTOCC# RSTOUT# VSI/GPIO10/LED VSO/GPIO11/BEEP GPIO12/PME#
F75334D Thermal Diode recommended Layout
VREF VIN1,VIN2,VIN3 VIN4 SIGNALS BEST INPUT LEVEL IS ABOUT 1V
OVT# SLOTOCC# RSTOUT#
LED BEEP 3VCC PME#
ADDRESS SELECT
3VCC R35 TURBO0# R53 VTT
DT1 T2 T3
1 2 3 4 5 6 7 8 9 10 11 12 R36 R38 R40 R42 R44 R37 R39 R41 R43 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K CPU_STOP# CLK_Turbo1# CLK_Turbo2# PME# RSTOUT# OVT# FAN_FAULT# SCL SDA VIDIN0 VIDIN1 VIDIN2 VIDIN3 VIDIN4 VIDIN5 VIDIN6 VIDIN7
R45 R46 R48 R50 R52 R47 R49 R51 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K
1. The THERMDA and THERMDC tracks Must Not pass through/by PWM POWER-MOS, Linear Regulator and Clock generator. Keep as far as possible from POWER MOS. 2. Place an external 3300pF input filter capacitors across THERMDA, THERMDC and close to the F75334D. Near the pin D- (Pin# 2) Must Be placed a through hole into the GND Plane before connect to the external 3300pF capacitor.
R35 R35 R53 R53
Pull Pull Pull Pull
High High Down Down
4.7K 200K 4.7K 200K
Addr=0x6Ch Addr=0X68h Addr=0X66h# Addr=0X6Ah#
PWM PWM DAC DAC
Title Size B Date:
F75334 Application circuit Document Number Tuesday , July 04, 2006 Sheet 2 of 4 Rev
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July, 2007 V0.25P
F75334
12V 12V 8 8
3 FAN_CTL1 2
U1A 1 LM358
+ 4
PMOS
Q1 D1 1N4148 R1 4.7K JP1
5 FAN_CTL2 6
U1B 7 LM358
+ 4
PMOS
Q2 D2 1N4148 R2 4.7K JP2
R5 10K R9 3.9K
C1 47u
3 2 1 CON3
R3 C3
27K
FAN_IN1 R7 10K R10 3.9K C2 47u
R6 0.1u 10K
3 2 1 CON3
R4 C4
27K
FAN_IN2
R8 0.1u 10K
Linear FAN1 CONTROL
12V
Linear FAN2 CONTROL
8
3 FAN_CTL3 2
U2A 1 LM358
+ 4
PMOS Q3 D3 1N4148 R11 4.7K JP3 R13 10K C5 47u 3 2 1 CON3 R12 27K C6 R14 0.1u 10K FAN_IN3
R15 3.9K
Linear FAN3 CONTROL
Title F75334 Application circuit Size A Date: Document Number Monday , July 03, 2006 Sheet 1 of 4 Rev
57
July, 2007 V0.25P
F75334
Example 1:
3VCC R54 4.7K 12V D4 2N39061N4148 Q5 R58 4.7K Q7 MOSFET N 2N7002 JP4 C12 47u 3 2 1 CON3 C14 0.1u R62 27K R66 10K FAN_IN1 FAN_CTL2 R65 330 R61 1K 3VCC R55 4.7K 12V D5 2N39061N4148 Q6 R59 4.7K Q8 MOSFET N 2N7002 JP5 C13 47u 3 2 1 CON3 C15 0.1u R63 27K R67 10K FAN_IN2
R56 4.7K R60 1K FAN_CTL1 R64 330
R57 4.7K
PWM FAN1 SPEED CONTROL( 3w ire FAN )
PWM FAN2 SPEED CONTROL( 3w ire FAN )
12V 3VCC R68 4.7K D6 2N39061N4148 Q9 R70 4.7K Q10 MOSFET N 2N7002 JP6 C16 47u 3 2 1 CON3 C17 0.1u R72 27K R74 10K FAN_IN3
R69 4.7K R71 1K FAN_CTL3 R73 330
PWM FAN3 SPEED CONTROL( 3w ire FAN )
Example 2:
5V R75 4.7K FAN_CTL11 2N3906 Q11 4 HEADER Q12 MOSFET N 2N7002 C19 47u 4 3 2 1 JP8 D8 1N4148 R80 4.7K R84 27K C20 0.1u R86 10K FAN_IN1 FAN_CTL1 4 HEADER 4 3 2 1 JP7 FAN_CTL1 R81 27K C18 0.1u R83 10K 5V R76 4.7K
12V D7 1N4148 R78 4.7K FAN_IN1
3VCC
R77
4.7K
12V
R79 4.7K R82 1K FAN_CTL1 R85 330
FAN_CTL11
PWM FAN1(Only) 3w ire
PWM FAN1/2 SPEED CONTROL (4 w ire FAN)
Title Size B Date:
F75334 Application circuit Document Number Monday , July 03, 2006 Sheet 3 of 4 Rev
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July, 2007 V0.25P
F75334
CPU PWM Controller
PWM_VID7 PWM_VID6 PWM_VID5 PWM_VID4 PWM_VID3 PWM_VID2 PWM_VID1 PWM_VID0
CPU PWM Controller
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 CPU_VID7
VCC3V R90 4.7k R91 4.7k R92 4.7k R93 4.7k R94 4.7k R95 4.7k
3VCC R88 R96 R104 R106 R108 R110 4.7k 4.7k 4.7k 4.7k 4.7k 4.7k
VTT1.2 R87 R89 R103 R105 R107 R109 R111 R112 4.7k 4.7k 4.7k 4.7k 4.7k 4.7k 4.7k 4.7k
VID5
VID4
VID3
VID2
VID1
VID0
VTT1.2 R97 R97 R98 R99 R100 R101 R102 R102 4.7k 4.7k 4.7k 4.7k 4.7k 4.7k 4.7k 4.7k
VIDOUT0 IO_VIDIN0 IO_VIDIN1 IO_VIDIN2 IO_VIDIN3 IO_VIDIN4 IO_VIDIN5 IO_VIDIN6 VIDOUT1 VIDOUT2 VIDOUT3 VIDOUT4 VIDOUT5 IO_VIDIN7
F75334D
IO_VIDOUT0 IO_VIDOUT1 IO_VIDOUT2 IO_VIDOUT3 IO_VIDOUT4 IO_VIDOUT5 IO_VIDOUT6 IO_VIDOUT7
For VRM 10.0
F75334D
For VRM 11
PWM Controller
VCORE
CPU
F75334
SST
VDDIO
R117 300R R113 0 R114 0 VSO R115 0
SST
VCORE controlled by F75334 R115:ON R114:ON R113:OFF VCORE by-pass R115:OFF R114:OFF R113:ON
R119 0 VSI
F75334
AMDSI_CLK AMDSI_DAT
R118 300R
F75334
F75334
PECI R116 100K
PECI
VSI/VSO
PECI
AMDSI
Title Size C Date:
F75334 Application circuit Document Number Monday , July 03, 2006 Sheet 4 of 4 Rev
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July, 2007 V0.25P

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